From 013e66ea95a241c472b9d87430efaf6c759cf5c0 Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Tue, 7 Jan 2025 12:23:37 -0700
Subject: [PATCH] [PATCH] riscv: add mising masking in lrsc expander (PR118137)
gcc:
PR target/118137
* config/riscv/sync.md ("lrsc_atomic_exchange<mode>"): Apply mask
to shifted value.
gcc/testsuite:
PR target/118137
* gcc.dg/atomic/pr118137.c: New.
---
gcc/config/riscv/sync.md | 1 +
gcc/testsuite/gcc.dg/atomic/pr118137.c | 29 ++++++++++++++++++++++++++
2 files changed, 30 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/atomic/pr118137.c
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index 58f32d253f1b..726800a96623 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -467,6 +467,7 @@
rtx shifted_value = gen_reg_rtx (SImode);
riscv_lshift_subword (<MODE>mode, value, shift, &shifted_value);
+ emit_move_insn (shifted_value, gen_rtx_AND (SImode, shifted_value, mask));
emit_insn (gen_subword_atomic_exchange_strong (old, aligned_mem,
shifted_value, model,
diff --git a/gcc/testsuite/gcc.dg/atomic/pr118137.c b/gcc/testsuite/gcc.dg/atomic/pr118137.c
new file mode 100644
index 000000000000..7cdb2240aa36
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/atomic/pr118137.c
@@ -0,0 +1,29 @@
+/* Test that subword atomic operations only affect the subword. */
+/* { dg-do run } */
+/* { dg-require-effective-target sync_char_short } */
+
+void
+foo (char *x)
+{
+ __sync_fetch_and_or (x, 0xff);
+}
+
+void
+bar (short *y)
+{
+ __atomic_fetch_or (y, 0xffff, 0);
+}
+
+
+int
+main ()
+{
+ char b[4] = {};
+ foo(b);
+
+ short h[2] = {};
+ bar(h);
+
+ if (b[1] || b[2] || b[3] || h[1])
+ __builtin_abort();
+}
--
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