From 01a2ccd010c3587d7db5d54e2c8d5b880415b414 Mon Sep 17 00:00:00 2001
From: David Edelsohn <edelsohn@gnu.org>
Date: Fri, 25 Jan 2002 17:52:43 +0000
Subject: [PATCH] rs6000.md (prefetch): Make address V4SI mode so that the
address is restricted to legitimate form for...
* rs6000.md (prefetch): Make address V4SI mode so that the address
is restricted to legitimate form for instruction.
From-SVN: r49217
---
gcc/ChangeLog | 5 +++++
gcc/config/rs6000/rs6000.md | 35 ++++++-----------------------------
2 files changed, 11 insertions(+), 29 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f3a9bd76a03c..02c75c3947bd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2002-01-25 David Edelsohn <edelsohn@gnu.org>
+
+ * rs6000.md (prefetch): Make address V4SI mode so that the address
+ is restricted to legitimate form for instruction.
+
2002-01-25 Bob Wilson <bob.wilson@acm.org>
* doc/install.texi (xtensa-*-elf): New target.
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 3a7629313161..c1a716d0440c 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -13854,39 +13854,16 @@
DONE;
}")
-(define_expand "prefetch"
- [(prefetch (match_operand 0 "address_operand" "p")
- (match_operand 1 "const_int_operand" "n")
- (match_operand 2 "const_int_operand" "n"))]
- "TARGET_POWERPC"
- "
-{
- if (TARGET_32BIT)
- emit_insn (gen_prefetchsi (operands[0], operands[1], operands[2]));
- else
- emit_insn (gen_prefetchdi (operands[0], operands[1], operands[2]));
- DONE;
-}")
-
-(define_insn "prefetchsi"
- [(prefetch (match_operand:SI 0 "address_operand" "r")
+(define_insn "prefetch"
+ [(prefetch (match_operand:V4SI 0 "address_operand" "p")
(match_operand:SI 1 "const_int_operand" "n")
(match_operand:SI 2 "const_int_operand" "n"))]
- "TARGET_POWERPC && TARGET_32BIT"
- "*
-{
- return INTVAL (operands[1]) ? \"dcbtst 0,%0\" : \"dcbt 0,%0\";
-}"
- [(set_attr "type" "load")])
-
-(define_insn "prefetchdi"
- [(prefetch (match_operand:DI 0 "address_operand" "r")
- (match_operand:DI 1 "const_int_operand" "n")
- (match_operand:DI 2 "const_int_operand" "n"))]
- "TARGET_POWERPC && TARGET_64BIT"
+ "TARGET_POWERPC"
"*
{
- return INTVAL (operands[1]) ? \"dcbtst 0,%0\" : \"dcbt 0,%0\";
+ if (GET_CODE (operands[0]) == REG)
+ return INTVAL (operands[1]) ? \"dcbtst 0,%0\" : \"dcbt 0,%0\";
+ return INTVAL (operands[1]) ? \"dcbtst %a0\" : \"dcbt %a0\";
}"
[(set_attr "type" "load")])
--
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