From 01f5d5e8f9bc4df0b99dd5b825b39e10af543304 Mon Sep 17 00:00:00 2001
From: Andrew Stubbs <ams@codesourcery.com>
Date: Thu, 19 Mar 2020 17:43:12 +0000
Subject: [PATCH] amdgcn: Split 64-bit constant loads post-reload
This helps avoid spilling 64-bit constant loads to stack by simplifying the
code that LRA sees.
2020-04-24 Andrew Stubbs <ams@codesourcery.com>
gcc/
* config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
---
gcc/ChangeLog | 4 ++++
gcc/config/gcn/gcn.md | 8 +++++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d402ae643d33..2db3413a9731 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2020-04-24 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
+
2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
* config/aarch64/arm_sve.h: Add a comment.
diff --git a/gcc/config/gcn/gcn.md b/gcc/config/gcn/gcn.md
index 702ba55c11a2..8f5937781b2b 100644
--- a/gcc/config/gcn/gcn.md
+++ b/gcc/config/gcn/gcn.md
@@ -615,9 +615,11 @@
ds_read_b64\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
global_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
global_store_dwordx2\t%A0, %1%O0%g0"
- "(reload_completed && !MEM_P (operands[0]) && !MEM_P (operands[1])
- && !gcn_sgpr_move_p (operands[0], operands[1]))
- || (GET_CODE (operands[1]) == CONST_INT && !gcn_constant64_p (operands[1]))"
+ "reload_completed
+ && ((!MEM_P (operands[0]) && !MEM_P (operands[1])
+ && !gcn_sgpr_move_p (operands[0], operands[1]))
+ || (GET_CODE (operands[1]) == CONST_INT
+ && !gcn_constant64_p (operands[1])))"
[(set (match_dup 0) (match_dup 1))
(set (match_dup 2) (match_dup 3))]
{
--
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