diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 0f95d8e89189eedadfbb6c954882b318fbcf3c75..01d5199bbc202681d4ca278472664c4054c7d246 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -22033,6 +22033,22 @@ [(set_attr "type" "icmov") (set_attr "mode" "SI")]) +(define_insn "*movsicc_noc_zext_1" + [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r") + (zero_extend:DI + (if_then_else:SI (match_operator 1 "ix86_comparison_operator" + [(reg FLAGS_REG) (const_int 0)]) + (match_operand:SI 2 "nonimmediate_operand" "rm,0") + (match_operand:SI 3 "nonimmediate_operand" "0,rm"))))] + "TARGET_64BIT + && TARGET_CMOVE && !(MEM_P (operands[2]) && MEM_P (operands[3]))" + "@ + cmov%O2%C1\t{%2, %k0|%k0, %2} + cmov%O2%c1\t{%3, %k0|%k0, %3}" + [(set_attr "type" "icmov") + (set_attr "mode" "SI")]) + + ;; Don't do conditional moves with memory inputs. This splitter helps ;; register starved x86_32 by forcing inputs into registers before reload. (define_split diff --git a/gcc/testsuite/gcc.target/i386/cmov10.c b/gcc/testsuite/gcc.target/i386/cmov10.c new file mode 100644 index 0000000000000000000000000000000000000000..9ba23b191fbd07e2d460ce9f3f14ad9e7a3dbd13 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cmov10.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -dp" } */ +/* { dg-final { scan-assembler-not "zero_extendsidi" } } */ + + +void foo (unsigned long long *d, int a, unsigned int b, unsigned int c) +{ + *d = a ? b : c; +} + diff --git a/gcc/testsuite/gcc.target/i386/cmov11.c b/gcc/testsuite/gcc.target/i386/cmov11.c new file mode 100644 index 0000000000000000000000000000000000000000..ba8a5e692b142303b612607e662ac3eab36e2357 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/cmov11.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -dp" } */ +/* { dg-final { scan-assembler-not "zero_extendsidi" } } */ + +unsigned long long foo (int a, unsigned b, unsigned c) +{ + unsigned t = a ? b : c; + return t; +} +