From 04a9209dc865dafe3c9615f5c868aa3fd89b96cf Mon Sep 17 00:00:00 2001
From: Andrew Pinski <apinski@marvell.com>
Date: Thu, 13 Apr 2023 00:40:40 +0000
Subject: [PATCH] i386: Add new pattern for zero-extend cmov
After a phiopt change, I got a failure of cmov9.c.
The RTL IR has zero_extend on the outside of
the if_then_else rather than on the side. Both
ways are considered canonical as mentioned in
PR 66588.
This fixes the failure I got and also adds a testcase
which fails before even my phiopt patch but will pass
with this patch.
OK? Bootstrapped and tested on x86_64-linux-gnu with
no regressions.
gcc/ChangeLog:
* config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
gcc/testsuite/ChangeLog:
* gcc.target/i386/cmov10.c: New test.
* gcc.target/i386/cmov11.c: New test.
---
gcc/config/i386/i386.md | 16 ++++++++++++++++
gcc/testsuite/gcc.target/i386/cmov10.c | 10 ++++++++++
gcc/testsuite/gcc.target/i386/cmov11.c | 10 ++++++++++
3 files changed, 36 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/cmov10.c
create mode 100644 gcc/testsuite/gcc.target/i386/cmov11.c
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 0f95d8e89189..01d5199bbc20 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -22033,6 +22033,22 @@
[(set_attr "type" "icmov")
(set_attr "mode" "SI")])
+(define_insn "*movsicc_noc_zext_1"
+ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r")
+ (zero_extend:DI
+ (if_then_else:SI (match_operator 1 "ix86_comparison_operator"
+ [(reg FLAGS_REG) (const_int 0)])
+ (match_operand:SI 2 "nonimmediate_operand" "rm,0")
+ (match_operand:SI 3 "nonimmediate_operand" "0,rm"))))]
+ "TARGET_64BIT
+ && TARGET_CMOVE && !(MEM_P (operands[2]) && MEM_P (operands[3]))"
+ "@
+ cmov%O2%C1\t{%2, %k0|%k0, %2}
+ cmov%O2%c1\t{%3, %k0|%k0, %3}"
+ [(set_attr "type" "icmov")
+ (set_attr "mode" "SI")])
+
+
;; Don't do conditional moves with memory inputs. This splitter helps
;; register starved x86_32 by forcing inputs into registers before reload.
(define_split
diff --git a/gcc/testsuite/gcc.target/i386/cmov10.c b/gcc/testsuite/gcc.target/i386/cmov10.c
new file mode 100644
index 000000000000..9ba23b191fbd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov10.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -dp" } */
+/* { dg-final { scan-assembler-not "zero_extendsidi" } } */
+
+
+void foo (unsigned long long *d, int a, unsigned int b, unsigned int c)
+{
+ *d = a ? b : c;
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/cmov11.c b/gcc/testsuite/gcc.target/i386/cmov11.c
new file mode 100644
index 000000000000..ba8a5e692b14
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cmov11.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -dp" } */
+/* { dg-final { scan-assembler-not "zero_extendsidi" } } */
+
+unsigned long long foo (int a, unsigned b, unsigned c)
+{
+ unsigned t = a ? b : c;
+ return t;
+}
+
--
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