From 06d3f31384a89039c510531cf8012caed05b2ffd Mon Sep 17 00:00:00 2001
From: Pan Li <pan2.li@intel.com>
Date: Tue, 6 Aug 2024 20:59:37 +0800
Subject: [PATCH] Vect: Make sure the lhs type of .SAT_TRUNC has its mode
 precision [PR116202]

The .SAT_TRUNC vect pattern recog is valid when the lhs type has
its mode precision.  For example as below, QImode with 1 bit precision
like _Bool is invalid here.

g_12 = (long unsigned int) _2;
_13 = MIN_EXPR <g_12, 1>;
_3 = (_Bool) _13;

The above pattern cannot be recog as .SAT_TRUNC (g_12) because the dest
only has 1 bit precision with QImode mode.  Aka the type doesn't have
the mode precision.

The below tests are passed for this patch.
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.

	PR target/116202

gcc/ChangeLog:

	* tree-vect-patterns.cc (vect_recog_sat_trunc_pattern): Add the
	type_has_mode_precision_p check for the lhs type.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pr116202-run-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
---
 .../riscv/rvv/base/pr116202-run-1.c           | 24 +++++++++++++++++++
 gcc/tree-vect-patterns.cc                     |  5 ++--
 2 files changed, 27 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c
new file mode 100644
index 000000000000..d150f20b5d93
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr116202-run-1.c
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -march=rv64gcv_zvl256b -fdump-rtl-expand-details" } */
+
+int b[24];
+_Bool c[24];
+
+int main() {
+  for (int f = 0; f < 4; ++f)
+    b[f] = 6;
+
+  for (int f = 0; f < 24; f += 4)
+    c[f] = ({
+      int g = ({
+        unsigned long g = -b[f];
+        1 < g ? 1 : g;
+      });
+      g;
+    });
+
+  if (c[0] != 1)
+    __builtin_abort ();
+}
+
+/* { dg-final { scan-rtl-dump-not ".SAT_TRUNC " "expand" } } */
diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc
index b2c83cfd2190..87b3dc413b8b 100644
--- a/gcc/tree-vect-patterns.cc
+++ b/gcc/tree-vect-patterns.cc
@@ -4697,11 +4697,12 @@ vect_recog_sat_trunc_pattern (vec_info *vinfo, stmt_vec_info stmt_vinfo,
 
   tree ops[1];
   tree lhs = gimple_assign_lhs (last_stmt);
+  tree otype = TREE_TYPE (lhs);
 
-  if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL))
+  if (gimple_unsigned_integer_sat_trunc (lhs, ops, NULL)
+      && type_has_mode_precision_p (otype))
     {
       tree itype = TREE_TYPE (ops[0]);
-      tree otype = TREE_TYPE (lhs);
       tree v_itype = get_vectype_for_scalar_type (vinfo, itype);
       tree v_otype = get_vectype_for_scalar_type (vinfo, otype);
       internal_fn fn = IFN_SAT_TRUNC;
-- 
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