diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 3d0a1d12b14688bd5e190525efbec7f4ae253bc8..6981ec42af4e67669ea1e8db0b364f80a8ca042c 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -7894,12 +7894,12 @@ riscv_adjust_multi_push_cfi_prologue (int saved_size) } static void -riscv_emit_stack_tie (void) +riscv_emit_stack_tie (rtx reg) { if (Pmode == SImode) - emit_insn (gen_stack_tiesi (stack_pointer_rtx, hard_frame_pointer_rtx)); + emit_insn (gen_stack_tiesi (stack_pointer_rtx, reg)); else - emit_insn (gen_stack_tiedi (stack_pointer_rtx, hard_frame_pointer_rtx)); + emit_insn (gen_stack_tiedi (stack_pointer_rtx, reg)); } /*zcmp multi push and pop code_for_push_pop function ptr array */ @@ -8080,7 +8080,7 @@ riscv_expand_prologue (void) GEN_INT ((frame->hard_frame_pointer_offset - remaining_size).to_constant ())); RTX_FRAME_RELATED_P (emit_insn (insn)) = 1; - riscv_emit_stack_tie (); + riscv_emit_stack_tie (hard_frame_pointer_rtx); } /* Save the V registers. */ @@ -8111,7 +8111,7 @@ riscv_expand_prologue (void) allocation is ordered WRT fp setup and subsequent writes into the frame. */ if (frame_pointer_needed) - riscv_emit_stack_tie (); + riscv_emit_stack_tie (hard_frame_pointer_rtx); return; } @@ -8150,7 +8150,7 @@ riscv_expand_prologue (void) allocation is ordered WRT fp setup and subsequent writes into the frame. */ if (frame_pointer_needed) - riscv_emit_stack_tie (); + riscv_emit_stack_tie (hard_frame_pointer_rtx); } } @@ -8285,7 +8285,7 @@ riscv_expand_epilogue (int style) if (cfun->calls_alloca) { /* Emit a barrier to prevent loads from a deallocated stack. */ - riscv_emit_stack_tie (); + riscv_emit_stack_tie (hard_frame_pointer_rtx); need_barrier_p = false; poly_int64 adjust_offset = -frame->hard_frame_pointer_offset; @@ -8379,7 +8379,7 @@ riscv_expand_epilogue (int style) if (known_gt (step1, 0)) { /* Emit a barrier to prevent loads from a deallocated stack. */ - riscv_emit_stack_tie (); + riscv_emit_stack_tie (hard_frame_pointer_rtx); need_barrier_p = false; /* Restore the scalable frame which is assigned in prologue. */ @@ -8479,7 +8479,7 @@ riscv_expand_epilogue (int style) frame->mask = mask; /* Undo the above fib. */ if (need_barrier_p) - riscv_emit_stack_tie (); + riscv_emit_stack_tie (hard_frame_pointer_rtx); /* Deallocate the final bit of the frame. */ if (step2.to_constant () > 0) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index f46851dd471721b50416d5ff833ee4cab6dcd4e7..5e3ef789e42eb78d7879ef69975706fd334ab40b 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -3969,7 +3969,7 @@ (unspec:BLK [(match_operand:X 0 "register_operand" "r") (match_operand:X 1 "register_operand" "r")] UNSPEC_TIE))] - "" + "!rtx_equal_p (operands[0], operands[1])" "" [(set_attr "type" "ghost") (set_attr "length" "0")]