From 10f12d327a85dc0ef83291c7271763b034e69cf2 Mon Sep 17 00:00:00 2001
From: Uros Bizjak <ubizjak@gmail.com>
Date: Mon, 13 Nov 2023 23:55:41 +0100
Subject: [PATCH] i386: Rewrite pushfl<mode>2 and popfl<mode>1 as unspecs
Flags reg is valid only with CC mode.
gcc/ChangeLog:
* config/i386/i386-expand.h (gen_pushfl): New prototype.
(gen_popfl): Ditto.
* config/i386/i386-expand.cc (ix86_expand_builtin)
[case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
[case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
* config/i386/i386.cc (gen_pushfl): New function.
(gen_popfl): Ditto.
* config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
(@pushfl<mode>2): Rename from *pushfl<mode>2.
Rewrite as unspec using UNSPEC_PUSHFL.
(@popfl<mode>1): Rename from *popfl<mode>1.
Rewrite as unspec using UNSPEC_POPFL.
---
gcc/config/i386/i386-expand.cc | 4 ++--
gcc/config/i386/i386-expand.h | 2 ++
gcc/config/i386/i386.cc | 31 +++++++++++++++++++++++++++++++
gcc/config/i386/i386.md | 14 +++++++++-----
4 files changed, 44 insertions(+), 7 deletions(-)
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index b52ec51fbe47..a8d871d321e4 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -14265,7 +14265,7 @@ rdseed_step:
if (ignore)
return const0_rtx;
- emit_insn (gen_push (gen_rtx_REG (word_mode, FLAGS_REG)));
+ emit_insn (gen_pushfl ());
if (optimize
|| target == NULL_RTX
@@ -14284,7 +14284,7 @@ rdseed_step:
op0 = copy_to_mode_reg (word_mode, op0);
emit_insn (gen_push (op0));
- emit_insn (gen_pop (gen_rtx_REG (word_mode, FLAGS_REG)));
+ emit_insn (gen_popfl ());
return 0;
case IX86_BUILTIN_KTESTC8:
diff --git a/gcc/config/i386/i386-expand.h b/gcc/config/i386/i386-expand.h
index 8e65f7dee457..1ea789c4c3a2 100644
--- a/gcc/config/i386/i386-expand.h
+++ b/gcc/config/i386/i386-expand.h
@@ -45,7 +45,9 @@ enum calling_abi ix86_function_abi (const_tree fndecl);
bool ix86_function_ms_hook_prologue (const_tree fn);
void warn_once_call_ms2sysv_xlogues (const char *feature);
rtx gen_push (rtx arg);
+rtx gen_pushfl (void);
rtx gen_pop (rtx arg);
+rtx gen_popfl (void);
rtx ix86_expand_builtin (tree exp, rtx target, rtx subtarget,
machine_mode mode, int ignore);
bool ix86_vectorize_vec_perm_const (machine_mode vmode, machine_mode op_mode,
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 176ca650aa25..683ac643bc89 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -6465,6 +6465,24 @@ gen_push (rtx arg)
arg);
}
+rtx
+gen_pushfl (void)
+{
+ struct machine_function *m = cfun->machine;
+ rtx flags, mem;
+
+ if (m->fs.cfa_reg == stack_pointer_rtx)
+ m->fs.cfa_offset += UNITS_PER_WORD;
+ m->fs.sp_offset += UNITS_PER_WORD;
+
+ flags = gen_rtx_REG (CCmode, FLAGS_REG);
+
+ mem = gen_rtx_MEM (word_mode,
+ gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx));
+
+ return gen_pushfl2 (word_mode, mem, flags);
+}
+
/* Generate an "pop" pattern for input ARG. */
rtx
@@ -6479,6 +6497,19 @@ gen_pop (rtx arg)
stack_pointer_rtx)));
}
+rtx
+gen_popfl (void)
+{
+ rtx flags, mem;
+
+ flags = gen_rtx_REG (CCmode, FLAGS_REG);
+
+ mem = gen_rtx_MEM (word_mode,
+ gen_rtx_POST_INC (Pmode, stack_pointer_rtx));
+
+ return gen_popfl1 (word_mode, flags, mem);
+}
+
/* Generate a "push2" pattern for input ARG. */
rtx
gen_push2 (rtx mem, rtx reg1, rtx reg2)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 47d21f12c5b0..29289f48e9c0 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -115,6 +115,8 @@
UNSPEC_SBB
UNSPEC_CC_NE
UNSPEC_STC
+ UNSPEC_PUSHFL
+ UNSPEC_POPFL
;; For SSE/MMX support:
UNSPEC_FIX_NOTRUNC
@@ -2205,17 +2207,19 @@
[(set_attr "type" "pop")
(set_attr "mode" "<MODE>")])
-(define_insn "*pushfl<mode>2"
+(define_insn "@pushfl<mode>2"
[(set (match_operand:W 0 "push_operand" "=<")
- (match_operand:W 1 "flags_reg_operand"))]
+ (unspec:W [(match_operand:CC 1 "flags_reg_operand")]
+ UNSPEC_PUSHFL))]
""
"pushf{<imodesuffix>}"
[(set_attr "type" "push")
(set_attr "mode" "<MODE>")])
-(define_insn "*popfl<mode>1"
- [(set (match_operand:W 0 "flags_reg_operand")
- (match_operand:W 1 "pop_operand" ">"))]
+(define_insn "@popfl<mode>1"
+ [(set (match_operand:CC 0 "flags_reg_operand")
+ (unspec:CC [(match_operand:W 1 "pop_operand" ">")]
+ UNSPEC_POPFL))]
""
"popf{<imodesuffix>}"
[(set_attr "type" "pop")
--
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