From 11049cdf204bc96bc407e5dd44ed3b8a492f405a Mon Sep 17 00:00:00 2001 From: Alfie Richards <alfie.richards@arm.com> Date: Thu, 4 Jul 2024 09:09:19 +0200 Subject: [PATCH] Aarch64, bugfix: Fix NEON bigendian addp intrinsic [PR114890] This change removes code that switches the operands in bigendian mode erroneously. This fixes the related test also. gcc/ChangeLog: PR target/114890 * config/aarch64/aarch64-simd.md: Remove bigendian operand swap. gcc/testsuite/ChangeLog: PR target/114890 * gcc.target/aarch64/vector_intrinsics_asm.c: Remove xfail. --- gcc/config/aarch64/aarch64-simd.md | 2 -- gcc/testsuite/gcc.target/aarch64/vector_intrinsics_asm.c | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index fd0c5e612b56..fd10039f9a27 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -7379,8 +7379,6 @@ nunits /= 2; rtx par_even = aarch64_gen_stepped_int_parallel (nunits, 0, 2); rtx par_odd = aarch64_gen_stepped_int_parallel (nunits, 1, 2); - if (BYTES_BIG_ENDIAN) - std::swap (operands[1], operands[2]); emit_insn (gen_aarch64_addp<mode>_insn (operands[0], operands[1], operands[2], par_even, par_odd)); DONE; diff --git a/gcc/testsuite/gcc.target/aarch64/vector_intrinsics_asm.c b/gcc/testsuite/gcc.target/aarch64/vector_intrinsics_asm.c index b7d5620abab8..e3dcd0830c84 100644 --- a/gcc/testsuite/gcc.target/aarch64/vector_intrinsics_asm.c +++ b/gcc/testsuite/gcc.target/aarch64/vector_intrinsics_asm.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ -/* { dg-final { check-function-bodies "**" "" "" { xfail be } } } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ #include "arm_neon.h" -- GitLab