From 14da764809d3bffe9336e72999312ba3fb019dc6 Mon Sep 17 00:00:00 2001 From: GCC Administrator <gccadmin@gcc.gnu.org> Date: Tue, 6 Jun 2023 00:17:33 +0000 Subject: [PATCH] Daily bump. --- gcc/ChangeLog | 196 ++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/d/ChangeLog | 9 ++ gcc/testsuite/ChangeLog | 23 +++++ libgcc/ChangeLog | 18 ++++ libiberty/ChangeLog | 11 +++ 6 files changed, 258 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ef27a12b8803..fae8c1016404 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,199 @@ +2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> + Joel Hutton <joel.hutton@arm.com> + + * doc/generic.texi: Remove old tree codes. + * expr.cc (expand_expr_real_2): Remove old tree code cases. + * gimple-pretty-print.cc (dump_binary_rhs): Likewise. + * optabs-tree.cc (optab_for_tree_code): Likewise. + (supportable_half_widening_operation): Likewise. + * tree-cfg.cc (verify_gimple_assign_binary): Likewise. + * tree-inline.cc (estimate_operator_cost): Likewise. + (op_symbol_code): Likewise. + * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise. + (vect_analyze_data_ref_accesses): Likewise. + * tree-vect-generic.cc (expand_vector_operations_1): Likewise. + * cfgexpand.cc (expand_debug_expr): Likewise. + * tree-vect-stmts.cc (vectorizable_conversion): Likewise. + (supportable_widening_operation): Likewise. + * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard): + Likewise. + * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab, + vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab, + vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab, + vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs. + * tree-pretty-print.cc (dump_generic_node): Remove tree code definition. + * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR, + VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR, + VEC_WIDEN_MINUS_LO_EXPR): Likewise. + +2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> + Joel Hutton <joel.hutton@arm.com> + Tamar Christina <tamar.christina@arm.com> + + * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename + this ... + (vec_widen_<su>add_lo_<mode>): ... to this. + (vec_widen_<su>addl_hi_<mode>): Rename this ... + (vec_widen_<su>add_hi_<mode>): ... to this. + (vec_widen_<su>subl_lo_<mode>): Rename this ... + (vec_widen_<su>sub_lo_<mode>): ... to this. + (vec_widen_<su>subl_hi_<mode>): Rename this ... + (vec_widen_<su>sub_hi_<mode>): ...to this. + * doc/generic.texi: Document new IFN codes. + * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function. + (commutative_binary_fn_p): Add widen_plus fn's. + (widening_fn_p): New function. + (narrowing_fn_p): New function. + (direct_internal_fn_optab): Change visibility. + * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an + internal_fn that expands into multiple internal_fns for widening. + (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO, + IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD, + IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI, + IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD, + IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions. + * internal-fn.h (direct_internal_fn_optab): Declare new prototype. + (lookup_hilo_internal_fn): Likewise. + (widening_fn_p): Likewise. + (Narrowing_fn_p): Likewise. + * optabs.cc (commutative_optab_p): Add widening plus optabs. + * optabs.def (OPTAB_D): Define widen add, sub optabs. + * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support + patterns with a hi/lo or even/odd split. + (vect_recog_sad_pattern): Refactor to use new IFN codes. + (vect_recog_widen_plus_pattern): Likewise. + (vect_recog_widen_minus_pattern): Likewise. + (vect_recog_average_pattern): Likewise. + * tree-vect-stmts.cc (vectorizable_conversion): Add support for + _HILO IFNs. + (supportable_widening_operation): Likewise. + * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs. + +2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> + Joel Hutton <joel.hutton@arm.com> + + * tree-vect-patterns.cc: Add include for gimple-iterator. + (vect_recog_widen_op_pattern): Refactor to use code_helper. + (vect_gimple_build): New function. + * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use + code_helper. + (vectorizable_call): Likewise. + (vect_gen_widened_results_half): Likewise. + (vect_create_vectorized_demotion_stmts): Likewise. + (vect_create_vectorized_promotion_stmts): Likewise. + (vect_create_half_widening_stmts): Likewise. + (vectorizable_conversion): Likewise. + (supportable_widening_operation): Likewise. + (supportable_narrowing_operation): Likewise. + * tree-vectorizer.h (supportable_widening_operation): Change + prototype to use code_helper. + (supportable_narrowing_operation): Likewise. + (vect_gimple_build): New function prototype. + * tree.h (code_helper::safe_as_tree_code): New function. + (code_helper::safe_as_fn_code): New function. + +2023-06-05 Roger Sayle <roger@nextmovesoftware.com> + + * wide-int.cc (wi::bitreverse_large): New function implementing + bit reversal of an integer. + * wide-int.h (wi::bitreverse): New (template) function prototype. + (bitreverse_large): Prototype helper function/implementation. + (wi::bitreverse): New template wrapper around bitreverse_large. + +2023-06-05 Uros Bizjak <ubizjak@gmail.com> + + * rtl.h (print_rtl_single): Change return type from int to void. + (print_rtl_single_with_indent): Ditto. + * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool. + * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change. + (rtx_writer::print_rtx_operand_code_0): Ditto. + (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto. + (rtx_writer::print_rtx_operand_code_i): Ditto. + (rtx_writer::print_rtx_operand_code_u): Ditto. + (rtx_writer::print_rtx_operand): Ditto. + (rtx_writer::print_rtx): Ditto. + (rtx_writer::finish_directive): Ditto. + (print_rtl_single): Change return type from int to void + and adjust function body accordingly. + (rtx_writer::print_rtl_single_with_indent): Ditto. + +2023-06-05 Uros Bizjak <ubizjak@gmail.com> + + * rtl.h (reg_classes_intersect_p): Change return type from int to bool. + (reg_class_subset_p): Ditto. + * reginfo.cc (reg_classes_intersect_p): Ditto. + (reg_class_subset_p): Ditto. + +2023-06-05 Pan Li <pan2.li@intel.com> + + * config/riscv/riscv-vector-builtins-types.def + (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS. + (vfloat32m1_t): Ditto. + (vfloat32m2_t): Ditto. + (vfloat32m4_t): Ditto. + (vfloat32m8_t): Ditto. + (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS. + (vint16mf2_t): Ditto. + (vint16m1_t): Ditto. + (vint16m2_t): Ditto. + (vint16m4_t): Ditto. + (vint16m8_t): Ditto. + (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS. + (vuint16mf2_t): Ditto. + (vuint16m1_t): Ditto. + (vuint16m2_t): Ditto. + (vuint16m4_t): Ditto. + (vuint16m8_t): Ditto. + (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS. + (vint32m1_t): Ditto. + (vint32m2_t): Ditto. + (vint32m4_t): Ditto. + (vint32m8_t): Ditto. + (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS. + (vuint32m1_t): Ditto. + (vuint32m2_t): Ditto. + (vuint32m4_t): Ditto. + (vuint32m8_t): Ditto. + * config/riscv/vector-iterators.md: Add FP=16 support for V, + VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1. + +2023-06-05 Andrew Pinski <apinski@marvell.com> + + PR bootstrap/110085 + * Makefile.in (clean): Remove the removing of + MULTILIB_DIR/MULTILIB_OPTIONS directories. + +2023-06-05 YunQiang Su <yunqiang.su@cipunited.com> + + * config/mips/mips-protos.h (mips_emit_speculation_barrier): New + prototype. + * config/mips/mips.cc (speculation_barrier_libfunc): New static + variable. + (mips_init_libfuncs): Initialize it. + (mips_emit_speculation_barrier): New function. + * config/mips/mips.md (speculation_barrier): Call + mips_emit_speculation_barrier. + +2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions. + (rvv_builder::can_duplicate_repeating_sequence_p): Ditto. + (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto. + (rvv_builder::get_merged_repeating_sequence): Ditto. + (rvv_builder::get_merge_scalar_mask): Ditto. + (emit_scalar_move_insn): Ditto. + (emit_vlmax_integer_move_insn): Ditto. + (emit_nonvlmax_integer_move_insn): Ditto. + (emit_vlmax_gather_insn): Ditto. + (emit_vlmax_masked_gather_mu_insn): Ditto. + (get_repeating_sequence_dup_machine_mode): Ditto. + +2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/autovec.md: Split arguments. + * config/riscv/riscv-protos.h (expand_vec_perm): Ditto. + * config/riscv/riscv-v.cc (expand_vec_perm): Ditto. + 2023-06-04 Andrew Pinski <apinski@marvell.com> * expr.cc (do_store_flag): Improve for single bit testing diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 3e73975bf5e4..7e14e0ee1460 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230605 +20230606 diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog index e6c6d7cd2c57..8ed7364e64bb 100644 --- a/gcc/d/ChangeLog +++ b/gcc/d/ChangeLog @@ -1,3 +1,12 @@ +2023-06-05 Iain Buclaw <ibuclaw@gdcproject.org> + + * gdc.texi (Warnings): Document -Wextra and -Wmismatched-special-enum. + * implement-d.texi (Special Enums): Add reference to warning option + -Wmismatched-special-enum. + * lang.opt: Add -Wextra and -Wmismatched-special-enum. + * types.cc (TypeVisitor::visit (TypeEnum *)): Warn when declared + special enum size mismatches its intrinsic type. + 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> * d-codegen.cc (underlying_complex_expr): Use _P defines from tree.h. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 811f990181bc..326aede9fcc3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,26 @@ +2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com> + Joel Hutton <joel.hutton@arm.com> + Tamar Christina <tamar.christina@arm.com> + + * gcc.target/aarch64/vect-widen-add.c: Test that new + IFN_VEC_WIDEN_PLUS is being used. + * gcc.target/aarch64/vect-widen-sub.c: Test that new + IFN_VEC_WIDEN_MINUS is being used. + +2023-06-05 Iain Buclaw <ibuclaw@gdcproject.org> + + * gdc.dg/Wmismatched_enum.d: New test. + +2023-06-05 Liao Shihua <shihua@iscas.ac.cn> + + * gcc.target/riscv/xtheadcondmov-indirect-rv32.c: Generalize to be + less sensitive to register allocation choices. + * gcc.target/riscv/xtheadcondmov-indirect-rv64.c: Similarly. + +2023-06-05 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/base/zvfh-intrinsic.c: New test. + 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai> PR target/110109 diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 66e1ee3ae41b..f6ff5ce1382d 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,21 @@ +2023-06-05 Kewen Lin <linkw@linux.ibm.com> + + * config/i386/morestack.S: Use @init_array rather than + @progbits for section type of section .init_array. + * config/rs6000/morestack.S: Likewise. + * config/s390/morestack.S: Likewise. + +2023-06-05 YunQiang Su <yunqiang.su@cipunited.com> + + * config/mips/lib1funcs.S: New file. + define __speculation_barrier and include mips16.S. + * config/mips/t-mips: define LIB1ASMSRC as mips/lib1funcs.S. + define LIB1ASMFUNCS as _speculation_barrier. + set version info for __speculation_barrier. + * config/mips/libgcc-mips.ver: New file. + * config/mips/t-mips16: don't define LIB1ASMSRC as mips16.S + included in lib1funcs.S now. + 2023-06-03 Thomas Neumann <tneumann@users.sourceforge.net> PR libgcc/109670 diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog index 41b7fecc61c7..d362426c1bdf 100644 --- a/libiberty/ChangeLog +++ b/libiberty/ChangeLog @@ -1,3 +1,14 @@ +2023-06-05 Costas Argyris <costas.argyris@gmail.com> + + * pex-win32.c: fix typos. + +2023-06-05 Costas Argyris <costas.argyris@gmail.com> + + * pex-win32.c (win32_spawn): Check command line length + and generate a response file if necessary. + (spawn_script): Adjust parameters. + (pex_win32_exec_child): Ditto. + 2023-06-03 Patrick Palka <ppalka@redhat.com> PR c++/70790 -- GitLab