From 16b2cafd0088500dc098121ed6d1aa622f1dc8a5 Mon Sep 17 00:00:00 2001
From: Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
Date: Fri, 16 Jun 2017 09:30:52 +0000
Subject: [PATCH] Enable -fprefetch-loop-arrays at given optimization level.
* config/aarch64/aarch64.c (aarch64_override_options_internal):
Set flag_prefetch_loop_arrays according to tuning data.
Change-Id: Id41411e671e0a55dc7268e0ad0a4e8ff1421c90a
From-SVN: r249241
---
gcc/ChangeLog | 5 +++++
gcc/config/aarch64/aarch64-protos.h | 1 +
gcc/config/aarch64/aarch64.c | 21 +++++++++++++++++----
3 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a78e7363a69b..0ed2ac1373cc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
+
+ * config/aarch64/aarch64.c (aarch64_override_options_internal):
+ Set flag_prefetch_loop_arrays according to tuning data.
+
2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune):
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index bb06139c4bb6..bfe44a75e12f 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -210,6 +210,7 @@ struct cpu_prefetch_tune
const int l1_cache_size;
const int l1_cache_line_size;
const int l2_cache_size;
+ const int default_opt_level;
};
struct tune_params
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index e3296c0570f3..324a0f1fea5b 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -532,7 +532,8 @@ static const cpu_prefetch_tune generic_prefetch_tune =
0, /* num_slots */
-1, /* l1_cache_size */
-1, /* l1_cache_line_size */
- -1 /* l2_cache_size */
+ -1, /* l2_cache_size */
+ -1 /* default_opt_level */
};
static const cpu_prefetch_tune exynosm1_prefetch_tune =
@@ -540,7 +541,8 @@ static const cpu_prefetch_tune exynosm1_prefetch_tune =
0, /* num_slots */
-1, /* l1_cache_size */
64, /* l1_cache_line_size */
- -1 /* l2_cache_size */
+ -1, /* l2_cache_size */
+ -1 /* default_opt_level */
};
static const cpu_prefetch_tune qdf24xx_prefetch_tune =
@@ -548,7 +550,8 @@ static const cpu_prefetch_tune qdf24xx_prefetch_tune =
0, /* num_slots */
-1, /* l1_cache_size */
64, /* l1_cache_line_size */
- -1 /* l2_cache_size */
+ -1, /* l2_cache_size */
+ -1 /* default_opt_level */
};
static const cpu_prefetch_tune thunderx2t99_prefetch_tune =
@@ -556,7 +559,8 @@ static const cpu_prefetch_tune thunderx2t99_prefetch_tune =
0, /* num_slots */
-1, /* l1_cache_size */
64, /* l1_cache_line_size */
- -1 /* l2_cache_size */
+ -1, /* l2_cache_size */
+ -1 /* default_opt_level */
};
static const struct tune_params generic_tunings =
@@ -8806,6 +8810,15 @@ aarch64_override_options_internal (struct gcc_options *opts)
opts->x_param_values,
global_options_set.x_param_values);
+ /* Enable sw prefetching at specified optimization level for
+ CPUS that have prefetch. Lower optimization level threshold by 1
+ when profiling is enabled. */
+ if (opts->x_flag_prefetch_loop_arrays < 0
+ && !opts->x_optimize_size
+ && aarch64_tune_params.prefetch->default_opt_level >= 0
+ && opts->x_optimize >= aarch64_tune_params.prefetch->default_opt_level)
+ opts->x_flag_prefetch_loop_arrays = 1;
+
aarch64_override_options_after_change_1 (opts);
}
--
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