From 1b5c57e53e7ee4087e10f51fcf74968d950d3d83 Mon Sep 17 00:00:00 2001
From: Pan Li <pan2.li@intel.com>
Date: Mon, 5 Aug 2024 16:01:11 +0800
Subject: [PATCH] RISC-V: Update .SAT_TRUNC dump check due to middle-end change
Due to recent middle-end change, update the .SAT_TRUNC expand dump
check from 2 to 4.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c: Adjust
asm check times from 2 to 4.
Signed-off-by: Pan Li <pan2.li@intel.com>
Signed-off-by: Pan Li <pan2.li@intel.com>
---
.../gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c
index 7f047f3f6a2b..ae3e44cd57e8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c
@@ -16,4 +16,4 @@
*/
DEF_VEC_SAT_U_TRUNC_FMT_1 (uint8_t, uint16_t)
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" } } */
--
GitLab