diff --git a/contrib/ChangeLog b/contrib/ChangeLog index 8a9526ade5c8905c2547e2b7f1de21c38848083d..faf76427eec492a9cdc0bfc01a17bccbfe797b8e 100644 --- a/contrib/ChangeLog +++ b/contrib/ChangeLog @@ -1,3 +1,8 @@ +2024-02-05 Jakub Jelinek <jakub@redhat.com> + + * test_installed: Fill in HOSTCC, HOSTCXX, HOSTCFLAGS and + HOSTCXXFLAGS. + 2024-02-04 Jonathan Wakely <jwakely@redhat.com> * unicode/gen_libstdcxx_unicode_data.py: Add copyright and diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4cbc90dbb8ecb1e25acaa2efb7ff27513e290bf5..0e3ac48ea04ced15fca397fe69baf195649ba5c0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,83 @@ +2024-02-05 Christoph Müllner <christoph.muellner@vrull.eu> + + * config/riscv/thead.cc (th_print_operand_address): Fix compiler + warning. + +2024-02-05 H.J. Lu <hjl.tools@gmail.com> + + PR target/113689 + * config/i386/i386.cc (x86_64_select_profile_regnum): New. + (x86_function_profiler): Call x86_64_select_profile_regnum to + get a scratch register for large model profiling. + +2024-02-05 Richard Ball <richard.ball@arm.com> + + * config/arm/arm.cc (arm_output_mi_thunk): Emit + insn for bti_c when bti is enabled. + +2024-02-05 Xi Ruoyao <xry111@xry111.site> + + * config/mips/mips-msa.md (neg<mode:MSA>2): Add missing mode for + neg. + +2024-02-05 Xi Ruoyao <xry111@xry111.site> + + * config/mips/mips-msa.md (elmsgnbit): New define_mode_attr. + (neg<mode>2): Change the mode iterator from MSA to IMSA because + in FP arithmetic we cannot use (0 - x) for -x. + (neg<mode>2): New define_insn to implement FP vector negation, + using a bnegi instruction to negate the sign bit. + +2024-02-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/113707 + * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): After + checking the avail set treat out-of-region defines as + available. + +2024-02-05 Richard Biener <rguenther@suse.de> + + * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Use + the default mode when building a pointer. + +2024-02-05 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/113737 + * gimple-lower-bitint.cc (gimple_lower_bitint): If GIMPLE_SWITCH + has just a single label, remove it and make single successor edge + EDGE_FALLTHRU. + +2024-02-05 Jakub Jelinek <jakub@redhat.com> + + PR target/113059 + * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper): + Remove REG_DEAD/REG_UNUSED notes at the end of the pass before + df_analyze call. + +2024-02-05 Richard Biener <rguenther@suse.de> + + PR target/113255 + * config/i386/i386-expand.cc + (expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves): + Use a new pseudo for the skipped number of bytes. + +2024-02-05 Monk Chiang <monk.chiang@sifive.com> + + * config/riscv/riscv-cores.def: Add sifive-p450, sifive-p670. + * doc/invoke.texi (RISC-V Options): Add sifive-p450, + sifive-p670. + +2024-02-05 Monk Chiang <monk.chiang@sifive.com> + + * config/riscv/riscv.md: Include sifive-p400.md. + * config/riscv/sifive-p400.md: New file. + * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter. + * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): + Add sifive_p400. + * config/riscv/riscv.cc (sifive_p400_tune_info): New. + * config/riscv/riscv.h (TARGET_SFB_ALU): Update. + * doc/invoke.texi (RISC-V Options): Add sifive-p400-series + 2024-02-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> * config/xtensa/xtensa.md (*eqne_zero_masked_bits): diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index a53d85f6c3550e5bf068fd11954ed7d4023df7d3..14a359f38317b24d72daf3e77a0a7cda9d895bb8 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240205 +20240206 diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index eb3e02c85049fc51a7fe92aa4c150ccf326ac285..002bf415b15cff7c281c4c8dfccccaabf327057e 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,10 @@ +2024-02-05 Jakub Jelinek <jakub@redhat.com> + + PR c/113740 + * c-decl.cc (finish_struct): Only use build_bitint_type if + bit-field has width larger or equal to minimum _BitInt + precision. + 2024-01-31 Joseph Myers <josmyers@redhat.com> PR c/112571 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index f524ec633aa4c87eba2f4af45e95b962bb411806..452a70c390f71d25f1762e7bcbf57ceed54d9b05 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,8 @@ +2024-02-05 Jason Merrill <jason@redhat.com> + + PR c++/111286 + * tree.cc (rvalue): Don't drop cv-quals from an array. + 2024-02-03 Patrick Palka <ppalka@redhat.com> PR c++/110006 diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index a5656aa6f46e27b7bab32ef0faf15e7da049dd7a..c0ff212c4f86adce193e19f6ce4cb13aef143bbb 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,7 @@ +2024-02-05 Joseph Myers <josmyers@redhat.com> + + * zh_CN.po: Update. + 2023-07-31 Joseph Myers <joseph@codesourcery.com> * sv.po: Update. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5748a98a38f375cdca702cfa5572d77599b2fcb2..a824e2373514c648dd7f25459557870adb98c2dc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,50 @@ +2024-02-05 Jason Merrill <jason@redhat.com> + + PR c++/109359 + * g++.dg/ext/frounding-math1.C: New test. + +2024-02-05 Jason Merrill <jason@redhat.com> + + PR c++/111286 + * g++.dg/cpp0x/initlist-array22.C: New test. + +2024-02-05 H.J. Lu <hjl.tools@gmail.com> + + PR target/113689 + * gcc.target/i386/pr113689-1.c: New file. + * gcc.target/i386/pr113689-2.c: Likewise. + * gcc.target/i386/pr113689-3.c: Likewise. + +2024-02-05 Jakub Jelinek <jakub@redhat.com> + + PR c/113740 + * gcc.dg/bitint-85.c: New test. + +2024-02-05 Richard Ball <richard.ball@arm.com> + + * lib/target-supports.exp: Add v8_1_m_main_pacbti. + * g++.target/arm/bti_thunk.C: New test. + +2024-02-05 H.J. Lu <(no_default)> + + * gcc.target/i386/apx-ndd.c: Updated. + +2024-02-05 Richard Biener <rguenther@suse.de> + + PR tree-optimization/113707 + * gcc.dg/torture/pr113707-1.c: New testcase. + * gcc.dg/torture/pr113707-2.c: Likewise. + +2024-02-05 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/113737 + * gcc.dg/bitint-84.c: New test. + +2024-02-05 Monk Chiang <monk.chiang@sifive.com> + + * gcc.target/riscv/mcpu-sifive-p450.c: New test. + * gcc.target/riscv/mcpu-sifive-p670.c: New test. + 2024-02-04 Jeff Law <jlaw@ventanamicro.com> * gcc.target/riscv/reg_subreg_costs.c: New test. diff --git a/libitm/ChangeLog b/libitm/ChangeLog index 83aadd151c75eeab3136c7cbe9c95202dbcda0d6..5ecca11637241477bf90b4305c6f24d820e16601 100644 --- a/libitm/ChangeLog +++ b/libitm/ChangeLog @@ -1,3 +1,7 @@ +2024-02-05 Marek Polacek <polacek@redhat.com> + + * containers.h (vector): Remove the template-id in constructors. + 2024-01-03 Jakub Jelinek <jakub@redhat.com> * libitm.texi: Bump @copying's copyright year.