diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h
index 6b23ec809f6c91c02b609907c958c6cf341f687c..a3643c5e12182a608c552ebde440f9868bb9ce80 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h
@@ -25,6 +25,15 @@ TEST_UNARY_STRUCT(uint16_t, uint64_t)
TEST_UNARY_STRUCT(uint32_t, uint64_t)
+TEST_UNARY_STRUCT(int8_t, int16_t)
+TEST_UNARY_STRUCT(int8_t, int32_t)
+TEST_UNARY_STRUCT(int8_t, int64_t)
+
+TEST_UNARY_STRUCT(int16_t, int32_t)
+TEST_UNARY_STRUCT(int16_t, int64_t)
+
+TEST_UNARY_STRUCT(int32_t, int64_t)
+
TEST_UNARY_STRUCT_DECL(uint8_t, uint16_t) \
TEST_UNARY_DATA(uint8_t, uint16_t)[] =
{
@@ -391,4 +400,286 @@ TEST_UNARY_STRUCT_DECL(uint32_t, uint64_t) \
},
};
+TEST_UNARY_STRUCT_DECL(int8_t, int16_t) \
+ TEST_UNARY_DATA(int8_t, int16_t)[] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ },
+ {
+ {
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ -128, -128, -128, -128,
+ -129, -129, -129, -129,
+ },
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ },
+ {
+ {
+ 32766, 32766, 32766, 32766,
+ 32767, 32767, 32767, 32767,
+ -32767, -32767, -32767, -32767,
+ -32768, -32768, -32768, -32768,
+ },
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ },
+};
+
+TEST_UNARY_STRUCT_DECL(int8_t, int32_t) \
+ TEST_UNARY_DATA(int8_t, int32_t)[] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ },
+ {
+ {
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ -128, -128, -128, -128,
+ -129, -129, -129, -129,
+ },
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ },
+ {
+ {
+ 2147483646, 2147483646, 2147483646, 2147483646,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483647, -2147483647, -2147483647, -2147483647,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ },
+};
+
+TEST_UNARY_STRUCT_DECL(int8_t, int64_t) \
+ TEST_UNARY_DATA(int8_t, int64_t)[] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ },
+ {
+ {
+ 127, 127, 127, 127,
+ 128, 128, 128, 128,
+ -128, -128, -128, -128,
+ -129, -129, -129, -129,
+ },
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ },
+ {
+ {
+ 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
+ -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
+ -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+ },
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ },
+};
+
+TEST_UNARY_STRUCT_DECL(int16_t, int32_t) \
+ TEST_UNARY_DATA(int16_t, int32_t)[] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ },
+ {
+ {
+ 32767, 32767, 32767, 32767,
+ 32768, 32768, 32768, 32768,
+ -32768, -32768, -32768, -32768,
+ -32769, -32769, -32769, -32769,
+ },
+ {
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ },
+ },
+ {
+ {
+ 2147483646, 2147483646, 2147483646, 2147483646,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483647, -2147483647, -2147483647, -2147483647,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ {
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ },
+ },
+};
+
+TEST_UNARY_STRUCT_DECL(int16_t, int64_t) \
+ TEST_UNARY_DATA(int16_t, int64_t)[] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ },
+ {
+ {
+ 32767, 32767, 32767, 32767,
+ 32768, 32768, 32768, 32768,
+ -32768, -32768, -32768, -32768,
+ -32769, -32769, -32769, -32769,
+ },
+ {
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ },
+ },
+ {
+ {
+ 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
+ -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
+ -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+ },
+ {
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ },
+ },
+};
+
+TEST_UNARY_STRUCT_DECL(int32_t, int64_t) \
+ TEST_UNARY_DATA(int32_t, int64_t)[] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ {
+ 0, 0, 0, 0,
+ -1, -1, -1, -1,
+ 1, 1, 1, 1,
+ 2, 2, 2, 2,
+ },
+ },
+ {
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483648, 2147483648, 2147483648, 2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483649, -2147483649, -2147483649, -2147483649,
+ },
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ },
+ {
+ {
+ 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll, 9223372036854775806ll,
+ 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll, 9223372036854775807ll,
+ -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll, -9223372036854775807ll,
+ -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+ },
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ },
+};
+
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c
new file mode 100644
index 0000000000000000000000000000000000000000..dd87dfd0f64edfdc6d55d1f7f60edfb95f773273
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "../vec_sat_arith.h"
+
+DEF_VEC_SAT_S_TRUNC_FMT_1(int8_t, int16_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c
new file mode 100644
index 0000000000000000000000000000000000000000..caf646f9520d7cc830ff52f9bc32bcc777503858
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "../vec_sat_arith.h"
+
+DEF_VEC_SAT_S_TRUNC_FMT_1(int16_t, int32_t, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c
new file mode 100644
index 0000000000000000000000000000000000000000..f06267a5c474e33a1192384019462b83adb1ffae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "../vec_sat_arith.h"
+
+DEF_VEC_SAT_S_TRUNC_FMT_1(int8_t, int32_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c
new file mode 100644
index 0000000000000000000000000000000000000000..f784937fd482aba471a9808660350fa58426d027
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "../vec_sat_arith.h"
+
+DEF_VEC_SAT_S_TRUNC_FMT_1(int16_t, int64_t, INT16_MIN, INT16_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c
new file mode 100644
index 0000000000000000000000000000000000000000..1e5289c751c932a928dfe426e0aa8dd31a472655
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "../vec_sat_arith.h"
+
+DEF_VEC_SAT_S_TRUNC_FMT_1(int32_t, int64_t, INT32_MIN, INT32_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c
new file mode 100644
index 0000000000000000000000000000000000000000..2fb604b7ddcd288b42fd920bf3f905a106c28fe4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fdump-rtl-expand-details" } */
+
+#include "../vec_sat_arith.h"
+
+DEF_VEC_SAT_S_TRUNC_FMT_1(int8_t, int64_t, INT8_MIN, INT8_MAX)
+
+/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c
new file mode 100644
index 0000000000000000000000000000000000000000..508cf348fc9e890fa4c171022a1265708c00a7de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "../vec_sat_arith.h"
+#include "vec_sat_data.h"
+
+#define T1 int8_t
+#define T2 int16_t
+
+DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define T TEST_UNARY_STRUCT_DECL(T1, T2)
+#define DATA TEST_UNARY_DATA_WRAP(T1, T2)
+#define RUN_UNARY(out, in, N) RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, out, in, N)
+
+#include "vec_sat_unary_vv_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c
new file mode 100644
index 0000000000000000000000000000000000000000..3b7c3b6a88216a035ac1063cbe76131528e37bb2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "../vec_sat_arith.h"
+#include "vec_sat_data.h"
+
+#define T1 int16_t
+#define T2 int32_t
+
+DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, INT16_MIN, INT16_MAX)
+
+#define T TEST_UNARY_STRUCT_DECL(T1, T2)
+#define DATA TEST_UNARY_DATA_WRAP(T1, T2)
+#define RUN_UNARY(out, in, N) RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, out, in, N)
+
+#include "vec_sat_unary_vv_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c
new file mode 100644
index 0000000000000000000000000000000000000000..508cf348fc9e890fa4c171022a1265708c00a7de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "../vec_sat_arith.h"
+#include "vec_sat_data.h"
+
+#define T1 int8_t
+#define T2 int16_t
+
+DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define T TEST_UNARY_STRUCT_DECL(T1, T2)
+#define DATA TEST_UNARY_DATA_WRAP(T1, T2)
+#define RUN_UNARY(out, in, N) RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, out, in, N)
+
+#include "vec_sat_unary_vv_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c
new file mode 100644
index 0000000000000000000000000000000000000000..4a049ce679a2f2dc5ca6a505f6c0e295acda79ba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "../vec_sat_arith.h"
+#include "vec_sat_data.h"
+
+#define T1 int16_t
+#define T2 int64_t
+
+DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, INT16_MIN, INT16_MAX)
+
+#define T TEST_UNARY_STRUCT_DECL(T1, T2)
+#define DATA TEST_UNARY_DATA_WRAP(T1, T2)
+#define RUN_UNARY(out, in, N) RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, out, in, N)
+
+#include "vec_sat_unary_vv_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c
new file mode 100644
index 0000000000000000000000000000000000000000..15b6670b1c8552f6b241e37c306ccf34c4ba7fad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "../vec_sat_arith.h"
+#include "vec_sat_data.h"
+
+#define T1 int32_t
+#define T2 int64_t
+
+DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, INT32_MIN, INT32_MAX)
+
+#define T TEST_UNARY_STRUCT_DECL(T1, T2)
+#define DATA TEST_UNARY_DATA_WRAP(T1, T2)
+#define RUN_UNARY(out, in, N) RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, out, in, N)
+
+#include "vec_sat_unary_vv_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c
new file mode 100644
index 0000000000000000000000000000000000000000..5a1dd857b440c9619726f6a0db06d5ad44474f1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99" } */
+
+#include "../vec_sat_arith.h"
+#include "vec_sat_data.h"
+
+#define T1 int8_t
+#define T2 int64_t
+
+DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, INT8_MIN, INT8_MAX)
+
+#define T TEST_UNARY_STRUCT_DECL(T1, T2)
+#define DATA TEST_UNARY_DATA_WRAP(T1, T2)
+#define RUN_UNARY(out, in, N) RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(T1, T2, out, in, N)
+
+#include "vec_sat_unary_vv_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vec_sat_arith.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vec_sat_arith.h
index b5ed662f3a99495c540986ebcfcd3561caeb5211..2c98e15fd2be0ad8f6f1ce1e2db41caf6ec0eb48 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vec_sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vec_sat_arith.h
@@ -647,6 +647,23 @@ vec_sat_u_trunc_##NT##_##WT##_fmt_4 (NT *out, WT *in, unsigned limit) \
}
#define DEF_VEC_SAT_U_TRUNC_FMT_4_WRAP(NT, WT) DEF_VEC_SAT_U_TRUNC_FMT_4(NT, WT)
+#define DEF_VEC_SAT_S_TRUNC_FMT_1(NT, WT, NT_MIN, NT_MAX) \
+void __attribute__((noinline)) \
+vec_sat_s_trunc_##NT##_##WT##_fmt_1 (NT *out, WT *in, unsigned limit) \
+{ \
+ unsigned i; \
+ for (i = 0; i < limit; i++) \
+ { \
+ WT x = in[i]; \
+ NT trunc = (NT)x; \
+ out[i] = (WT)NT_MIN <= x && x <= (WT)NT_MAX \
+ ? trunc \
+ : x < 0 ? NT_MIN : NT_MAX; \
+ } \
+}
+#define DEF_VEC_SAT_S_TRUNC_FMT_1_WRAP(NT, WT, NT_MIN, NT_MAX) \
+ DEF_VEC_SAT_S_TRUNC_FMT_1(NT, WT, NT_MIN, NT_MAX)
+
#define RUN_VEC_SAT_U_TRUNC_FMT_1(NT, WT, out, in, N) \
vec_sat_u_trunc_##NT##_##WT##_fmt_1 (out, in, N)
#define RUN_VEC_SAT_U_TRUNC_FMT_1_WRAP(NT, WT, out, in, N) \
@@ -667,4 +684,9 @@ vec_sat_u_trunc_##NT##_##WT##_fmt_4 (NT *out, WT *in, unsigned limit) \
#define RUN_VEC_SAT_U_TRUNC_FMT_4_WRAP(NT, WT, out, in, N) \
RUN_VEC_SAT_U_TRUNC_FMT_4(NT, WT, out, in, N)
+#define RUN_VEC_SAT_S_TRUNC_FMT_1(NT, WT, out, in, N) \
+ vec_sat_s_trunc_##NT##_##WT##_fmt_1 (out, in, N)
+#define RUN_VEC_SAT_S_TRUNC_FMT_1_WRAP(NT, WT, out, in, N) \
+ RUN_VEC_SAT_S_TRUNC_FMT_1(NT, WT, out, in, N)
+
#endif