From 23037e273c82cb2bbcf7eb4e20e0ff186e0ad7e5 Mon Sep 17 00:00:00 2001
From: "Cui, Lili" <lili.cui@intel.com>
Date: Tue, 15 Aug 2023 01:30:10 +0000
Subject: [PATCH] x86: Update model values for Alderlake and Rocketlake.
Fix build failure of commit 0fa76e35a5f9e141c08fdf151380f2f9689101c7
Update model values for Alderlake and Rocketlake according to SDM.
gcc/ChangeLog
* common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
from Rocketlake, and 0xbf from Alderlake.
(cherry picked from commit e510c3be13a8ccdf1fc1b27c2501c126d493f335)
---
gcc/common/config/i386/cpuinfo.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index d6f2b7e3cfb3..8e203bc17b79 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -463,7 +463,6 @@ get_intel_cpu (struct __processor_model *cpu_model,
cpu_model->__cpu_subtype = INTEL_COREI7_SKYLAKE;
break;
case 0xa7:
- case 0xa8:
/* Rocket Lake. */
cpu = "rocketlake";
CHECK___builtin_cpu_is ("corei7");
@@ -536,7 +535,6 @@ get_intel_cpu (struct __processor_model *cpu_model,
break;
case 0x97:
case 0x9a:
- case 0xbf:
/* Alder Lake. */
case 0xb7:
case 0xba:
--
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