From 2d4fa1f79c7b7a01e0b4fa27ee37b7030e6bf93f Mon Sep 17 00:00:00 2001
From: Andrea Corallo <andrea.corallo@arm.com>
Date: Thu, 5 Nov 2020 08:57:03 +0000
Subject: [PATCH] arm: [testcase] Better narrow some bfloat16 testcase

2020-11-05  Andrea Corallo  <andrea.corallo@arm.com>

	* gcc.target/arm/simd/vld1_lane_bf16_1.c: Require target to
	support and add -mfloat-abi=hard flag.
	* gcc.target/arm/simd/vld1_lane_bf16_indices_1.c: Likewise.
	* gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c: Likewise.
	* gcc.target/arm/simd/vst1_lane_bf16_1.c: Likewise.
	* gcc.target/arm/simd/vst1_lane_bf16_indices_1.c: Likewise.
	* gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c: Likewise.
---
 gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c          | 3 ++-
 gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c  | 2 ++
 gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c | 2 ++
 gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c          | 3 ++-
 gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c  | 2 ++
 gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c | 2 ++
 6 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c
index fa4e45b7217d..94fb38f32b8f 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c
@@ -1,7 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
-/* { dg-additional-options "-O3 --save-temps" } */
+/* { dg-additional-options "-O3 --save-temps -mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c
index c83eb53234d4..d9af512cf92c 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c
index 8e21e61c9c05..a73184c0f780 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c
index e018ec6592fb..8564b8fa0623 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c
@@ -1,7 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
-/* { dg-additional-options "-O3 --save-temps" } */
+/* { dg-additional-options "-O3 --save-temps -mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c
index 39870dc054cc..1bd68718d107 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
diff --git a/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c b/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c
index f31bd120fc21..f18a4792a14f 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c
@@ -1,6 +1,8 @@
 /* { dg-do assemble } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
+/* { dg-additional-options "-mfloat-abi=hard" } */
 
 #include "arm_neon.h"
 
-- 
GitLab