From 31f9eb59e568af9c0a74927727f206775ea3da55 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <hongjiu.lu@intel.com>
Date: Wed, 18 May 2011 22:12:28 +0000
Subject: [PATCH] Properly handle 256bit load cast.
gcc/
2011-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/49002
* config/i386/sse.md (avx_<ssemodesuffix><avxsizesuffix>_<ssemodesuffix>):
Properly handle load cast.
gcc/testsuite/
2011-05-18 H.J. Lu <hongjiu.lu@intel.com>
PR target/49002
* gcc.target/i386/pr49002-1.c: New test.
* gcc.target/i386/pr49002-2.c: Likewise.
From-SVN: r173880
---
gcc/ChangeLog | 6 ++++++
gcc/config/i386/sse.md | 9 +++++----
gcc/testsuite/ChangeLog | 6 ++++++
gcc/testsuite/gcc.target/i386/pr49002-1.c | 16 ++++++++++++++++
gcc/testsuite/gcc.target/i386/pr49002-2.c | 14 ++++++++++++++
5 files changed, 47 insertions(+), 4 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr49002-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr49002-2.c
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0850640b837f..c695f9b79987 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-05-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/49002
+ * config/i386/sse.md (avx_<ssemodesuffix><avxsizesuffix>_<ssemodesuffix>):
+ Properly handle load cast.
+
2011-05-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/49039
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 291bffb636e8..cf12a6d0c045 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -10294,12 +10294,13 @@
"&& reload_completed"
[(const_int 0)]
{
+ rtx op0 = operands[0];
rtx op1 = operands[1];
- if (REG_P (op1))
+ if (REG_P (op0))
+ op0 = gen_rtx_REG (<ssehalfvecmode>mode, REGNO (op0));
+ else
op1 = gen_rtx_REG (<MODE>mode, REGNO (op1));
- else
- op1 = gen_lowpart (<MODE>mode, op1);
- emit_move_insn (operands[0], op1);
+ emit_move_insn (op0, op1);
DONE;
})
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index bf4107cc42d3..649ac62f6895 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2011-05-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/49002
+ * gcc.target/i386/pr49002-1.c: New test.
+ * gcc.target/i386/pr49002-2.c: Likewise.
+
2011-05-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/49039
diff --git a/gcc/testsuite/gcc.target/i386/pr49002-1.c b/gcc/testsuite/gcc.target/i386/pr49002-1.c
new file mode 100644
index 000000000000..7553e8290e55
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr49002-1.c
@@ -0,0 +1,16 @@
+/* PR target/49002 */
+/* { dg-do compile } */
+/* { dg-options "-O -mavx" } */
+
+#include <immintrin.h>
+
+void foo(const __m128d *from, __m256d *to, int s)
+{
+ __m256d var = _mm256_castpd128_pd256(from[0]);
+ var = _mm256_insertf128_pd(var, from[s], 1);
+ to[0] = var;
+}
+
+/* Ensure we load into xmm, not ymm. */
+/* { dg-final { scan-assembler-not "vmovapd\[\t \]*\[^,\]*,\[\t \]*%ymm" } } */
+/* { dg-final { scan-assembler "vmovapd\[\t \]*\[^,\]*,\[\t \]*%xmm" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr49002-2.c b/gcc/testsuite/gcc.target/i386/pr49002-2.c
new file mode 100644
index 000000000000..b0e10091b5ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr49002-2.c
@@ -0,0 +1,14 @@
+/* PR target/49002 */
+/* { dg-do compile } */
+/* { dg-options "-O -mavx" } */
+
+#include <immintrin.h>
+
+void foo(const __m128d from, __m256d *to)
+{
+ *to = _mm256_castpd128_pd256(from);
+}
+
+/* Ensure we store ymm, not xmm. */
+/* { dg-final { scan-assembler-not "vmovapd\[\t \]*%xmm\[0-9\]\+,\[^,\]*" } } */
+/* { dg-final { scan-assembler "vmovapd\[\t \]*%ymm\[0-9\]\+,\[^,\]*" } } */
--
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