From 3787ee47fc5c67bffa0508e8a9cc70acb8ce4278 Mon Sep 17 00:00:00 2001
From: Michael Meissner <meissner@linux.vnet.ibm.com>
Date: Wed, 12 Jul 2017 23:07:50 +0000
Subject: [PATCH] re PR target/81193 (PowerPC GCC __builtin_cpu_is and
__builtin_cpu_supports should warn about old libraries)
[gcc]
2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If GLIBC
provides the hardware capability bits, define the macro
__BUILTIN_CPU_SUPPORTS__.
* config/rs6000/rs6000.c (cpu_expand_builtin): Generate a warning
if GLIBC does not provide the hardware capability bits. Add a
gcc_unreachable call if the built-in cpu function is neither
__builtin_cpu_is nor __builtin_cpu_supports.
(rs6000_get_function_versions_dispatcher): Change the warning
that an old GLIBC is used which does not export the capability
bits to be an error.
* doc/extend.texi (target_clones attribute): Document the
restriction that GLIBC 2.23 or newer is needed on the PowerPC.
(PowerPC built-in functions): Document that GLIBC 2.23 or newer is
needed by __builtin_cpu_is and __builtin_cpu_supports. Document
the macros defined by GCC if the newer GLIBC is available.
[gcc/testsuite]
2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* gcc.target/powerpc/bmi-andn-1.c: Add guard against using
__builtin_cpu_supports with old GLIBC's.
* gcc.target/powerpc/bmi-andn-2.c: Likewise.
* gcc.target/powerpc/bmi-bextr-1.c: Likewise.
* gcc.target/powerpc/bmi-bextr-2.c: Likewise.
* gcc.target/powerpc/bmi-bextr-4.c: Likewise.
* gcc.target/powerpc/bmi-bextr-5.c: Likewise.
* gcc.target/powerpc/bmi-blsi-1.c: Likewise.
* gcc.target/powerpc/bmi-blsi-2.c: Likewise.
* gcc.target/powerpc/bmi-blsmsk-1.c: Likewise.
* gcc.target/powerpc/bmi-blsmsk-2.c: Likewise.
* gcc.target/powerpc/bmi-blsr-1.c: Likewise.
* gcc.target/powerpc/bmi-blsr-2.c: Likewise.
* gcc.target/powerpc/bmi-tzcnt-1.c: Likewise.
* gcc.target/powerpc/bmi-tzcnt-2.c: Likewise.
* gcc.target/powerpc/bmi2-bzhi32-1.c: Likewise.
* gcc.target/powerpc/bmi2-bzhi64-1.c: Likewise.
* gcc.target/powerpc/bmi2-mulx32-1.c: Likewise.
* gcc.target/powerpc/bmi2-mulx32-2.c: Likewise.
* gcc.target/powerpc/bmi2-mulx64-1.c: Likewise.
* gcc.target/powerpc/bmi2-mulx64-2.c: Likewise.
* gcc.target/powerpc/bmi2-pdep32-1.c: Likewise.
* gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
* gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
* gcc.target/powerpc/cpu-builtin-1.c: Likewise.
[libgcc]
2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81193
* configure.ac (PowerPC float128 hardware support): Test whether
we can use __builtin_cpu_supports before enabling the ifunc
handler.
* configure: Regenerate.
From-SVN: r250165
---
gcc/ChangeLog | 19 ++++++
gcc/config/rs6000/rs6000-c.c | 3 +
gcc/config/rs6000/rs6000.c | 14 ++--
gcc/doc/extend.texi | 66 +++++++++++++------
gcc/testsuite/ChangeLog | 30 +++++++++
gcc/testsuite/gcc.target/powerpc/bmi-andn-1.c | 1 +
gcc/testsuite/gcc.target/powerpc/bmi-andn-2.c | 1 +
.../gcc.target/powerpc/bmi-bextr-1.c | 1 +
.../gcc.target/powerpc/bmi-bextr-2.c | 1 +
.../gcc.target/powerpc/bmi-bextr-4.c | 1 +
.../gcc.target/powerpc/bmi-bextr-5.c | 1 +
gcc/testsuite/gcc.target/powerpc/bmi-blsi-1.c | 1 +
gcc/testsuite/gcc.target/powerpc/bmi-blsi-2.c | 1 +
.../gcc.target/powerpc/bmi-blsmsk-1.c | 1 +
.../gcc.target/powerpc/bmi-blsmsk-2.c | 1 +
gcc/testsuite/gcc.target/powerpc/bmi-blsr-1.c | 1 +
gcc/testsuite/gcc.target/powerpc/bmi-blsr-2.c | 1 +
.../gcc.target/powerpc/bmi-tzcnt-1.c | 1 +
.../gcc.target/powerpc/bmi-tzcnt-2.c | 1 +
.../gcc.target/powerpc/bmi2-bzhi32-1.c | 1 +
.../gcc.target/powerpc/bmi2-bzhi64-1.c | 1 +
.../gcc.target/powerpc/bmi2-mulx32-1.c | 1 +
.../gcc.target/powerpc/bmi2-mulx32-2.c | 1 +
.../gcc.target/powerpc/bmi2-mulx64-1.c | 1 +
.../gcc.target/powerpc/bmi2-mulx64-2.c | 1 +
.../gcc.target/powerpc/bmi2-pdep32-1.c | 1 +
.../gcc.target/powerpc/bmi2-pdep64-1.c | 1 +
.../gcc.target/powerpc/bmi2-pext32-1.c | 1 +
.../gcc.target/powerpc/bmi2-pext64-1.c | 1 +
.../gcc.target/powerpc/cpu-builtin-1.c | 1 +
libgcc/ChangeLog | 8 +++
libgcc/configure | 11 ++--
libgcc/configure.ac | 11 ++--
33 files changed, 155 insertions(+), 32 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f9350a5183e8..6e62befe6d1f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,22 @@
+2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/81193
+ * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If GLIBC
+ provides the hardware capability bits, define the macro
+ __BUILTIN_CPU_SUPPORTS__.
+ * config/rs6000/rs6000.c (cpu_expand_builtin): Generate a warning
+ if GLIBC does not provide the hardware capability bits. Add a
+ gcc_unreachable call if the built-in cpu function is neither
+ __builtin_cpu_is nor __builtin_cpu_supports.
+ (rs6000_get_function_versions_dispatcher): Change the warning
+ that an old GLIBC is used which does not export the capability
+ bits to be an error.
+ * doc/extend.texi (target_clones attribute): Document the
+ restriction that GLIBC 2.23 or newer is needed on the PowerPC.
+ (PowerPC built-in functions): Document that GLIBC 2.23 or newer is
+ needed by __builtin_cpu_is and __builtin_cpu_supports. Document
+ the macros defined by GCC if the newer GLIBC is available.
+
2017-07-12 Jeff Law <law@redhat.com>
* config/riscv/riscv.c: Remove unnecessary includes. Reorder
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index c7694425feb9..96521a270934 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -644,6 +644,9 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
builtin_define ("__FLOAT128_HARDWARE__");
if (TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (TFmode))
builtin_define ("__ibm128=long double");
+#ifdef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
+ builtin_define ("__BUILTIN_CPU_SUPPORTS__");
+#endif
/* We needed to create a keyword if -mfloat128-type was used but not -mfloat,
so we used __ieee128. If -mfloat128 was used, create a #define back to
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 10c552152a45..af5b5f1a2f62 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -15176,6 +15176,8 @@ cpu_expand_builtin (enum rs6000_builtins fcode, tree exp ATTRIBUTE_UNUSED,
emit_insn (gen_eqsi3 (scratch2, scratch1, const0_rtx));
emit_insn (gen_rtx_SET (target, gen_rtx_XOR (SImode, scratch2, const1_rtx)));
}
+ else
+ gcc_unreachable ();
/* Record that we have expanded a CPU builtin, so that we can later
emit a reference to the special symbol exported by LIBC to ensure we
@@ -15183,6 +15185,9 @@ cpu_expand_builtin (enum rs6000_builtins fcode, tree exp ATTRIBUTE_UNUSED,
cpu_builtin_p = true;
#else
+ warning (0, "%s needs GLIBC (2.23 and newer) that exports hardware "
+ "capability bits", rs6000_builtin_info[(size_t) fcode].name);
+
/* For old LIBCs, always return FALSE. */
emit_move_insn (target, GEN_INT (0));
#endif /* TARGET_LIBC_PROVIDES_HWCAP_IN_TCB */
@@ -37284,10 +37289,10 @@ rs6000_get_function_versions_dispatcher (void *decl)
default_node = default_version_info->this_node;
#ifndef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
- warning_at (DECL_SOURCE_LOCATION (default_node->decl), 0,
- "target_clone needs GLIBC (2.23 and newer) to export hardware "
- "capability bits");
-#endif
+ error_at (DECL_SOURCE_LOCATION (default_node->decl),
+ "target_clones attribute needs GLIBC (2.23 and newer) that "
+ "exports hardware capability bits");
+#else
if (targetm.has_ifunc_p ())
{
@@ -37320,6 +37325,7 @@ rs6000_get_function_versions_dispatcher (void *decl)
"multiversioning needs ifunc which is not supported "
"on this target");
}
+#endif
return dispatch_decl;
}
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 530a82dd2c00..27363fc5a923 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -3282,7 +3282,8 @@ one compiled with @option{-msse4.1} and another with @option{-mavx}.
On a PowerPC, you can compile a function with
@code{target_clones("cpu=power9,default")}. GCC will create two
function clones, one compiled with @option{-mcpu=power9} and another
-with the default options.
+with the default options. GCC must be configured to use GLIBC 2.23 or
+newer in order to use the @code{target_clones} attribute.
It also creates a resolver function (see
the @code{ifunc} attribute above) that dynamically selects a clone
@@ -14945,8 +14946,18 @@ to maintain API compatibility with the x86 builtins.
@deftypefn {Built-in Function} int __builtin_cpu_is (const char *@var{cpuname})
This function returns a value of @code{1} if the run-time CPU is of type
-@var{cpuname} and returns @code{0} otherwise. The following CPU names can be
-detected:
+@var{cpuname} and returns @code{0} otherwise
+
+The @code{__builtin_cpu_is} function requires GLIBC 2.23 or newer
+which exports the hardware capability bits. GCC defines the macro
+@code{__BUILTIN_CPU_SUPPORTS__} if the @code{__builtin_cpu_supports}
+built-in function is fully supported.
+
+If GCC was configured to use a GLIBC before 2.23, the built-in
+function @code{__builtin_cpu_is} always returns a 0 and the compiler
+issues a warning.
+
+The following CPU names can be detected:
@table @samp
@item power9
@@ -14983,20 +14994,33 @@ IBM PowerPC Cell Broadband Engine Architecture CPU.
Here is an example:
@smallexample
-if (__builtin_cpu_is ("power8"))
- @{
- do_power8 (); // POWER8 specific implementation.
- @}
-else
- @{
- do_generic (); // Generic implementation.
- @}
+#ifdef __BUILTIN_CPU_SUPPORTS__
+ if (__builtin_cpu_is ("power8"))
+ @{
+ do_power8 (); // POWER8 specific implementation.
+ @}
+ else
+#endif
+ @{
+ do_generic (); // Generic implementation.
+ @}
@end smallexample
@end deftypefn
@deftypefn {Built-in Function} int __builtin_cpu_supports (const char *@var{feature})
This function returns a value of @code{1} if the run-time CPU supports the HWCAP
-feature @var{feature} and returns @code{0} otherwise. The following features can be
+feature @var{feature} and returns @code{0} otherwise.
+
+The @code{__builtin_cpu_supports} function requires GLIBC 2.23 or
+newer which exports the hardware capability bits. GCC defines the
+macro @code{__BUILTIN_CPU_SUPPORTS__} if the
+@code{__builtin_cpu_supports} built-in function is fully supported.
+
+If GCC was configured to use a GLIBC before 2.23, the built-in
+function @code{__builtin_cpu_suports} always returns a 0 and the
+compiler issues a warning.
+
+The following features can be
detected:
@table @samp
@@ -15080,14 +15104,16 @@ CPU supports the vector-scalar extension.
Here is an example:
@smallexample
-if (__builtin_cpu_supports ("fpu"))
- @{
- asm("fadd %0,%1,%2" : "=d"(dst) : "d"(src1), "d"(src2));
- @}
-else
- @{
- dst = __fadd (src1, src2); // Software FP addition function.
- @}
+#ifdef __BUILTIN_CPU_SUPPORTS__
+ if (__builtin_cpu_supports ("fpu"))
+ @{
+ asm("fadd %0,%1,%2" : "=d"(dst) : "d"(src1), "d"(src2));
+ @}
+ else
+#endif
+ @{
+ dst = __fadd (src1, src2); // Software FP addition function.
+ @}
@end smallexample
@end deftypefn
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2afa99c044f3..b3b4f75f4ef7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,33 @@
+2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/81193
+ * gcc.target/powerpc/bmi-andn-1.c: Add guard against using
+ __builtin_cpu_supports with old GLIBC's.
+ * gcc.target/powerpc/bmi-andn-2.c: Likewise.
+ * gcc.target/powerpc/bmi-bextr-1.c: Likewise.
+ * gcc.target/powerpc/bmi-bextr-2.c: Likewise.
+ * gcc.target/powerpc/bmi-bextr-4.c: Likewise.
+ * gcc.target/powerpc/bmi-bextr-5.c: Likewise.
+ * gcc.target/powerpc/bmi-blsi-1.c: Likewise.
+ * gcc.target/powerpc/bmi-blsi-2.c: Likewise.
+ * gcc.target/powerpc/bmi-blsmsk-1.c: Likewise.
+ * gcc.target/powerpc/bmi-blsmsk-2.c: Likewise.
+ * gcc.target/powerpc/bmi-blsr-1.c: Likewise.
+ * gcc.target/powerpc/bmi-blsr-2.c: Likewise.
+ * gcc.target/powerpc/bmi-tzcnt-1.c: Likewise.
+ * gcc.target/powerpc/bmi-tzcnt-2.c: Likewise.
+ * gcc.target/powerpc/bmi2-bzhi32-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-bzhi64-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-mulx32-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-mulx32-2.c: Likewise.
+ * gcc.target/powerpc/bmi2-mulx64-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-mulx64-2.c: Likewise.
+ * gcc.target/powerpc/bmi2-pdep32-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-pdep64-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-pext32-1.c: Likewise.
+ * gcc.target/powerpc/bmi2-pext64-1.c: Likewise.
+ * gcc.target/powerpc/cpu-builtin-1.c: Likewise.
+
2017-07-12 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/p9-xxbr-1.c (rev_bool_char, rev_bool_short,
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-andn-1.c b/gcc/testsuite/gcc.target/powerpc/bmi-andn-1.c
index 8d8d643e088c..3702bdd77feb 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-andn-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-andn-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-andn-2.c b/gcc/testsuite/gcc.target/powerpc/bmi-andn-2.c
index a4260b51b790..a6f5d5084c9a 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-andn-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-andn-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-1.c b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-1.c
index f532c6a3bb5b..45e5bdd8510a 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O2 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-2.c b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-2.c
index b3515259fcaf..52f78df12676 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-4.c b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-4.c
index 8701d9fbd1d0..3ca566650330 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-4.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-5.c b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-5.c
index 2835adedced3..e43e2da422a3 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-bextr-5.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-bextr-5.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-blsi-1.c b/gcc/testsuite/gcc.target/powerpc/bmi-blsi-1.c
index 418d336b43e9..345a7eb9def2 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-blsi-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-blsi-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-blsi-2.c b/gcc/testsuite/gcc.target/powerpc/bmi-blsi-2.c
index 1d51b5a75bb1..f2e1a58f5ed8 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-blsi-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-blsi-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-1.c b/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-1.c
index df34d53ab86e..481b09f77ce1 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-2.c b/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-2.c
index e5fe12d4ee0a..3ba7e97dd47e 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-blsmsk-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-blsr-1.c b/gcc/testsuite/gcc.target/powerpc/bmi-blsr-1.c
index 645e00f05ee0..c383b7914e24 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-blsr-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-blsr-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-blsr-2.c b/gcc/testsuite/gcc.target/powerpc/bmi-blsr-2.c
index f290b838001a..61d962b91505 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-blsr-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-blsr-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-1.c b/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-1.c
index 25b096ad0bc5..25ba3dc238e6 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-2.c b/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-2.c
index 75397e53eb6e..1b80ccbdaa90 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi-tzcnt-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3 -fno-inline" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi32-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi32-1.c
index b2a6d4d74eac..f0943d7f9741 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi32-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi32-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi64-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi64-1.c
index a09d5d24b51e..33f1748b44e6 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi64-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-bzhi64-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-1.c
index eda74690589f..870679c779ff 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include "bmi2-check.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-2.c b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-2.c
index a6fc38cbf551..b8327741c3a0 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx32-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-1.c
index 5334de20fc5e..b1e4a13c2afb 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-1.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include "bmi2-check.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-2.c b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-2.c
index ff119262c64b..d57f05503c52 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-mulx64-2.c
@@ -1,6 +1,7 @@
/* { dg-do run } */
/* { dg-options "-O3" } */
/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c
index 12cf92eec2c8..a07567389d07 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-pdep32-1.c
@@ -3,6 +3,7 @@
/* { dg-require-effective-target lp64 } */
/* { dg-require-effective-target vsx_hw } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c
index 01e1fdaf5388..1268239e61f0 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-pdep64-1.c
@@ -3,6 +3,7 @@
/* { dg-require-effective-target lp64 } */
/* { dg-require-effective-target vsx_hw } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c
index 9450ef56aedb..762ed1b0325d 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-pext32-1.c
@@ -3,6 +3,7 @@
/* { dg-require-effective-target lp64 } */
/* { dg-require-effective-target vsx_hw } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c b/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c
index b76ae81b5bc3..5e269ec47de5 100644
--- a/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1.c
@@ -3,6 +3,7 @@
/* { dg-require-effective-target lp64 } */
/* { dg-require-effective-target vsx_hw } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
#define NO_WARN_X86_INTRINSICS 1
#include <x86intrin.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
index 684c0f6d17d2..c13fed7efd49 100644
--- a/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c
@@ -1,5 +1,6 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target ppc_cpu_supports_hw } */
void
use_cpu_is_builtins (unsigned int *p)
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 1a4de2c31e68..36e08471afba 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,11 @@
+2017-07-12 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/81193
+ * configure.ac (PowerPC float128 hardware support): Test whether
+ we can use __builtin_cpu_supports before enabling the ifunc
+ handler.
+ * configure: Regenerate.
+
2017-07-10 Vineet Gupta <vgupta@synopsys.com>
* config.host: Remove uclibc from arc target spec.
diff --git a/libgcc/configure b/libgcc/configure
index 42dda7fbeec2..15d34b27cc09 100644
--- a/libgcc/configure
+++ b/libgcc/configure
@@ -4975,10 +4975,10 @@ esac
esac
case ${host} in
-# At present, we cannot turn -mfloat128 on via #pragma GCC target,
-# so just check if we have VSX (ISA 2.06) support to build the
-# software libraries, and whether the assembler can handle xsaddqp
-# for hardware support.
+# At present, we cannot turn -mfloat128 on via #pragma GCC target, so just
+# check if we have VSX (ISA 2.06) support to build the software libraries, and
+# whether the assembler can handle xsaddqp for hardware support. Also check if
+# a new glibc is being used so that __builtin_cpu_supports can be used.
powerpc*-*-linux*)
saved_CFLAGS="$CFLAGS"
CFLAGS="$CFLAGS -mabi=altivec -mvsx -mfloat128"
@@ -5013,6 +5013,9 @@ else
#ifndef AT_PLATFORM
#error "AT_PLATFORM is not defined"
#endif
+ #ifndef __BUILTIN_CPU_SUPPORTS__
+ #error "__builtin_cpu_supports is not available"
+ #endif
vector unsigned char add (vector unsigned char a, vector unsigned char b)
{
vector unsigned char ret;
diff --git a/libgcc/configure.ac b/libgcc/configure.ac
index 6bcaad651ffd..da499716f8c8 100644
--- a/libgcc/configure.ac
+++ b/libgcc/configure.ac
@@ -376,10 +376,10 @@ esac
esac
case ${host} in
-# At present, we cannot turn -mfloat128 on via #pragma GCC target,
-# so just check if we have VSX (ISA 2.06) support to build the
-# software libraries, and whether the assembler can handle xsaddqp
-# for hardware support.
+# At present, we cannot turn -mfloat128 on via #pragma GCC target, so just
+# check if we have VSX (ISA 2.06) support to build the software libraries, and
+# whether the assembler can handle xsaddqp for hardware support. Also check if
+# a new glibc is being used so that __builtin_cpu_supports can be used.
powerpc*-*-linux*)
saved_CFLAGS="$CFLAGS"
CFLAGS="$CFLAGS -mabi=altivec -mvsx -mfloat128"
@@ -398,6 +398,9 @@ powerpc*-*-linux*)
#ifndef AT_PLATFORM
#error "AT_PLATFORM is not defined"
#endif
+ #ifndef __BUILTIN_CPU_SUPPORTS__
+ #error "__builtin_cpu_supports is not available"
+ #endif
vector unsigned char add (vector unsigned char a, vector unsigned char b)
{
vector unsigned char ret;
--
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