From 3cadd7783a7d69837dc2f60e448f156ca03215a0 Mon Sep 17 00:00:00 2001
From: Alexandre Oliva <aoliva@redhat.com>
Date: Tue, 22 Aug 2000 14:39:31 +0000
Subject: [PATCH] invoke.texi (SH Options): Document -m4-nofpu...
* invoke.texi (SH Options): Document -m4-nofpu,
-m4-single-only, -m4-single, -m4, -mbigtable, -mfmovd,
-mhitachi, -mnomacsave, -misize, -mpadstruct, -mspace.
From-SVN: r35875
---
gcc/ChangeLog | 6 ++++++
gcc/invoke.texi | 44 +++++++++++++++++++++++++++++++++++++++++++-
2 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7d7e5f60267b..edb75e87e3e8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2000-08-22 Alexandre Oliva <aoliva@redhat.com>
+
+ * invoke.texi (SH Options): Document -m4-nofpu,
+ -m4-single-only, -m4-single, -m4, -mbigtable, -mfmovd,
+ -mhitachi, -mnomacsave, -misize, -mpadstruct, -mspace.
+
2000-08-22 Joseph S. Myers <jsm28@cam.ac.uk>
* c-common.c (check_format_info): Give the 'some locales' warning
diff --git a/gcc/invoke.texi b/gcc/invoke.texi
index d4657a360b0d..b68b14c1a405 100644
--- a/gcc/invoke.texi
+++ b/gcc/invoke.texi
@@ -413,7 +413,11 @@ in the following sections.
-mrelax -mh -ms -mint32 -malign-300
@emph{SH Options}
--m1 -m2 -m3 -m3e -mb -ml -mdalign -mrelax
+-m1 -m2 -m3 -m3e
+-m4-nofpu -m4-single-only -m4-single -m4
+-mb -ml -mdalign -mrelax
+-mbigtable -mfmovd -mhitachi -mnomacsave
+-misize -mpadstruct -mspace
@emph{System V Options}
-Qy -Qn -YP,@var{paths} -Ym,@var{dir}
@@ -6657,6 +6661,20 @@ Generate code for the SH3.
@item -m3e
Generate code for the SH3e.
+@item -m4-nofpu
+Generate code for the SH4 without a floating-point unit.
+
+@item -m4-single-only
+Generate code for the SH4 with a floating-point unit that only
+supports single-precision arithmentic.
+
+@item -m4-single
+Generate code for the SH4 assuming the floating-point unit is in
+single-precision mode by default.
+
+@item -m4
+Generate code for the SH4.
+
@item -mb
Compile code for the processor in big endian mode.
@@ -6671,6 +6689,30 @@ not work unless you recompile it first with -mdalign.
@item -mrelax
Shorten some address references at link time, when possible; uses the
linker option @samp{-relax}.
+
+@item -mbigtable
+Use 32-bit offsets in @code{switch} tables. The default is to use
+16-bit offsets.
+
+@item -mfmovd
+Enable the use of the instruction @code{fmovd}.
+
+@item -mhitachi
+Comply with the calling conventions defined by Hitachi.
+
+@item -mnomacsave
+Mark the @code{MAC} register as call-clobbered, even if
+@code{-mhitachi} is given.
+
+@item -misize
+Dump instruction size and location in the assembly code.
+
+@item -mpadstruct
+This option is deprecated. It pads structures to multiple of 4 bytes,
+which is incompatible with the SH ABI.
+
+@item -mspace
+Optimize for space instead of speed. Implied by @code{-Os}.
@end table
@node System V Options
--
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