From 40de22d6f926dadb38c5b6cf46703843e3d2d1e7 Mon Sep 17 00:00:00 2001
From: Jakub Jelinek <jakub@redhat.com>
Date: Sat, 4 May 2013 14:41:52 +0200
Subject: [PATCH] combine.c (combine_simplify_rtx): If nonzero_bits on op shows
all bits zero in mode of a lowpart subreg, return zero.
* combine.c (combine_simplify_rtx) <case SUBREG>: If nonzero_bits
on op shows all bits zero in mode of a lowpart subreg, return zero.
From-SVN: r198595
---
gcc/ChangeLog | 5 +++++
gcc/combine.c | 11 +++++++++++
2 files changed, 16 insertions(+)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e91ea0027bbb..0a56d776b5f9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-05-04 Jakub Jelinek <jakub@redhat.com>
+
+ * combine.c (combine_simplify_rtx) <case SUBREG>: If nonzero_bits
+ on op shows all bits zero in mode of a lowpart subreg, return zero.
+
2013-05-03 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/57150
diff --git a/gcc/combine.c b/gcc/combine.c
index 0792ba3b6f41..b737bc5529fc 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -5417,6 +5417,17 @@ combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
SUBREG_BYTE (x));
if (temp)
return temp;
+
+ /* If op is known to have all lower bits zero, the result is zero. */
+ if (!in_dest
+ && SCALAR_INT_MODE_P (mode)
+ && SCALAR_INT_MODE_P (op0_mode)
+ && GET_MODE_PRECISION (mode) < GET_MODE_PRECISION (op0_mode)
+ && subreg_lowpart_offset (mode, op0_mode) == SUBREG_BYTE (x)
+ && HWI_COMPUTABLE_MODE_P (op0_mode)
+ && (nonzero_bits (SUBREG_REG (x), op0_mode)
+ & GET_MODE_MASK (mode)) == 0)
+ return CONST0_RTX (mode);
}
/* Don't change the mode of the MEM if that would change the meaning
--
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