diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b981c438798408028b26187753adb4b7146b153c..526f02bb5fe431b8de1c90c57563d0f62a522a2d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,151 @@ +2023-08-10 Jan Hubicka <jh@suse.cz> + + PR middle-end/110923 + * tree-ssa-loop-split.cc (split_loop): Watch for division by zero. + +2023-08-10 Patrick O'Neill <patrick@rivosinc.com> + + * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as + dependent on 'a' extension. + * config/riscv/riscv-opts.h (MASK_ZTSO): New mask. + (TARGET_ZTSO): New target. + * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add + Ztso case. + (riscv_memmodel_needs_amo_release): Add Ztso case. + (riscv_print_operand): Add Ztso case for LR/SC annotations. + * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md. + * config/riscv/riscv.opt: Add Ztso target variable. + * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or + Ztso specific insn. + (atomic_load<mode>): Expand to RVWMO or Ztso specific insn. + (atomic_store<mode>): Expand to RVWMO or Ztso specific insn. + * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO + specific load/store/fence mappings. + * config/riscv/sync-ztso.md: New file. Seperate out Ztso + specific load/store/fence mappings. + +2023-08-10 Jan Hubicka <jh@suse.cz> + + * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with + 0 iteration count. + +2023-08-10 Jan Hubicka <jh@suse.cz> + + * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update. + +2023-08-10 Jan Hubicka <jh@suse.cz> + + * profile-count.cc (profile_count::differs_from_p): Fix overflow and + handling of undefined values. + +2023-08-10 Jakub Jelinek <jakub@redhat.com> + + PR c/102989 + * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never + return virtual phis and return NULL if there is a virtual phi + where the arguments from E0 and E1 edges aren't equal. + +2023-08-10 Richard Biener <rguenther@suse.de> + + * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK, + VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW. + +2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/110962 + * config/riscv/autovec.md (vec_duplicate<mode>): New pattern. + +2023-08-10 Pan Li <pan2.li@intel.com> + + * config/riscv/riscv-vector-builtins-bases.cc + (class vfnmacc_frm): New class for vfnmacc. + (vfnmacc_frm_obj): New declaration. + (BASE): Ditto. + * config/riscv/riscv-vector-builtins-bases.h: Ditto. + * config/riscv/riscv-vector-builtins-functions.def + (vfnmacc_frm): New function definition. + +2023-08-10 Pan Li <pan2.li@intel.com> + + * config/riscv/riscv-vector-builtins-bases.cc + (class vfmacc_frm): New class for vfmacc frm. + (vfmacc_frm_obj): New declaration. + (BASE): Ditto. + * config/riscv/riscv-vector-builtins-bases.h: Ditto. + * config/riscv/riscv-vector-builtins-functions.def + (vfmacc_frm): New function definition. + +2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/110964 + * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary. + +2023-08-10 Richard Biener <rguenther@suse.de> + + * tree-vectorizer.h (vectorizable_live_operation): Remove + gimple_stmt_iterator * argument. + * tree-vect-loop.cc (vectorizable_live_operation): Likewise. + Adjust plumbing around vect_get_loop_mask. + (vect_analyze_loop_operations): Adjust. + * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise. + (vect_bb_slp_mark_live_stmts): Likewise. + (vect_schedule_slp_node): Likewise. + * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise. + Remove gimple_stmt_iterator * argument. + (vect_transform_stmt): Adjust. + +2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + * config/riscv/vector-iterators.md: Add missing modes. + +2023-08-10 Jakub Jelinek <jakub@redhat.com> + + PR c/102989 + * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION + is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT. + +2023-08-10 Jakub Jelinek <jakub@redhat.com> + + PR c/102989 + * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for + EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple + times. + +2023-08-10 liuhongt <hongtao.liu@intel.com> + + PR target/110832 + * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not + sanitize upper part of V4HFmode register with + -fno-trapping-math. + (<insn>v4hf3): Enable for ix86_partial_vec_fp_math. + (<divv4hf3): Ditto. + (<insn>v2hf3): Ditto. + (divv2hf3): Ditto. + (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode + register with -fno-trapping-math. + +2023-08-10 Pan Li <pan2.li@intel.com> + Kito Cheng <kito.cheng@sifive.com> + + * config/riscv/riscv-protos.h + (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL. + (get_frm_mode): New declaration. + * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode. + * config/riscv/riscv-vector-builtins.cc + (function_expander::use_ternop_insn): Take care of frm reg. + * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX. + (riscv_emit_frm_mode_set): Ditto. + (riscv_emit_mode_set): Ditto. + (riscv_frm_adjust_mode_after_call): Ditto. + (riscv_frm_mode_needed): Ditto. + (riscv_frm_mode_after): Ditto. + (riscv_mode_entry): Ditto. + (riscv_mode_exit): Ditto. + * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto. + * config/riscv/vector.md + (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed + (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly. + 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 9ae743a51cb14900fc98ee7bc5b75756750e4155..fa6960c56adaf5612ba05e6ddf4b1b45de48e08f 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230810 +20230811 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 26ab43eebf902612e4c6c343c938921fdc5585dc..d9d182a96a0de661fc5ea14864d302e9effe98d3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,56 @@ +2023-08-10 Jan Hubicka <jh@suse.cz> + + PR middle-end/110923 + * gcc.dg/tree-ssa/pr110923.c: New test. + +2023-08-10 Patrick O'Neill <patrick@rivosinc.com> + + * gcc.target/riscv/amo-table-ztso-amo-add-1.c: New test. + * gcc.target/riscv/amo-table-ztso-amo-add-2.c: New test. + * gcc.target/riscv/amo-table-ztso-amo-add-3.c: New test. + * gcc.target/riscv/amo-table-ztso-amo-add-4.c: New test. + * gcc.target/riscv/amo-table-ztso-amo-add-5.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: New test. + * gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: New test. + * gcc.target/riscv/amo-table-ztso-fence-1.c: New test. + * gcc.target/riscv/amo-table-ztso-fence-2.c: New test. + * gcc.target/riscv/amo-table-ztso-fence-3.c: New test. + * gcc.target/riscv/amo-table-ztso-fence-4.c: New test. + * gcc.target/riscv/amo-table-ztso-fence-5.c: New test. + * gcc.target/riscv/amo-table-ztso-load-1.c: New test. + * gcc.target/riscv/amo-table-ztso-load-2.c: New test. + * gcc.target/riscv/amo-table-ztso-load-3.c: New test. + * gcc.target/riscv/amo-table-ztso-store-1.c: New test. + * gcc.target/riscv/amo-table-ztso-store-2.c: New test. + * gcc.target/riscv/amo-table-ztso-store-3.c: New test. + * gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: New test. + * gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: New test. + * gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: New test. + * gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: New test. + * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: New test. + +2023-08-10 Jan Hubicka <jh@suse.cz> + + * gcc.dg/tree-ssa/phi_on_compare-1.c: Check profile consistency. + +2023-08-10 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/base/float-point-nmacc.c: New test. + +2023-08-10 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/base/float-point-macc.c: New test. + +2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai> + + PR target/110964 + * gcc.target/riscv/rvv/autovec/pr110964.c: New test. + 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai> * gcc.target/riscv/rvv/autovec/gather-scatter/strided_load_run-1.c: diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 369fbfb87f3923dd4c753dc22e88c3fc0f661f34..5820b7a852a4cc8ce4f73c8e06fe09efec71b8f4 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,30 @@ +2023-08-10 Jonathan Wakely <jwakely@redhat.com> + + PR libstdc++/110974 + * include/std/format (_Spec::_S_parse_width_or_precision): Check + for empty range before dereferencing iterator. + * testsuite/std/format/string.cc: Check for expected exception. + Fix expected exception message in test_pr110862() and actually + call it. + +2023-08-10 Jonathan Wakely <jwakely@redhat.com> + + PR libstdc++/110968 + * include/std/format (__formatter_fp::format): Check return + value of _M_localize. + * testsuite/std/format/functions/format.cc: Check classic + locale. + +2023-08-10 Jonathan Wakely <jwakely@redhat.com> + + PR libstdc++/110970 + * include/bits/stl_iterator.h (__detail::__move_iter_cat): Use + __iter_category_t. + (iterator_traits<common_iterator<I, S>>::_S_iter_cat): Likewise. + (__detail::__basic_const_iterator_iter_cat): Likewise. + * include/bits/stl_iterator_base_types.h (__iterator_category_t): + Rename to __iter_category_t. + 2023-08-09 Jonathan Wakely <jwakely@redhat.com> * include/bits/chrono.h (duration_cast): Do not use braces