From 45135f9d5f7316d1256813d808b0f37287ba77d3 Mon Sep 17 00:00:00 2001
From: Haochen Jiang <haochen.jiang@intel.com>
Date: Thu, 21 Nov 2024 14:31:26 +0800
Subject: [PATCH] i386/testsuite: Enhance AVX10.2 vmovd/w testcases
Under -fno-omit-frame-pointer, %ebp will be used, which is the
Solaris/x86 default. Both check %ebp and %esp to avoid error on that.
gcc/testsuite/ChangeLog:
PR target/117697
* gcc.target/i386/avx10_2-vmovd-1.c: Both check %esp and %ebp.
* gcc.target/i386/avx10_2-vmovw-1.c: Ditto.
---
gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c | 4 ++--
gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c | 3 +--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c
index 6a5d84ac6cde..21bd1a1ef0a4 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovd-1.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-final { scan-assembler-times "vmovd\t4\\(%esp\\), %xmm0" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "vmovss\t4\\(%esp\\), %xmm0" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "vmovd\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "vmovss\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 1 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovd\t%xmm0, %xmm0" 3 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovd\t%edi, %xmm0" 1 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vmovd\t%xmm0, %xmm0" 4 { target { ! ia32 } } } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c
index 6e05f72f6371..49fa51dc2ecc 100644
--- a/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx10_2-vmovw-1.c
@@ -1,7 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O2 -march=x86-64-v3 -mavx10.2" } */
-/* { dg-final { scan-assembler-times "vmovw\t4\\(%esp\\), %xmm0" 3 { target ia32 } } } */
-/* { dg-final { scan-assembler-times "vmovw\t8\\(%ebp\\), %xmm0" 1 { target ia32 } } } */
+/* { dg-final { scan-assembler-times "vmovw\t\[0-9\]+\\(%e\[bs\]p\\), %xmm0" 4 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovw\t%xmm0, %xmm0" 4 { target ia32 } } } */
/* { dg-final { scan-assembler-times "vmovw\t%edi, %xmm0" 1 { target { ! ia32 } } } } */
/* { dg-final { scan-assembler-times "vmovw\t%xmm0, %xmm0" 7 { target { ! ia32 } } } } */
--
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