From 49a14ee488b8569abe318ca230ab115c36ca6b0c Mon Sep 17 00:00:00 2001
From: Haochen Jiang <haochen.jiang@intel.com>
Date: Tue, 9 Jan 2024 14:59:30 +0800
Subject: [PATCH] Add -mevex512 into invoke.texi
Hi Richard,
It seems that I send out a not updated patch. This patch should what
I want to send.
Thx,
Haochen
gcc/ChangeLog:
* doc/invoke.texi: Add -mevex512.
---
gcc/doc/invoke.texi | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 216e2f594d1c..3d2a71109c2c 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1463,7 +1463,7 @@ See RS/6000 and PowerPC Options.
-mamx-tile -mamx-int8 -mamx-bf16 -muintr -mhreset -mavxvnni
-mavx512fp16 -mavxifma -mavxvnniint8 -mavxneconvert -mcmpccxadd -mamx-fp16
-mprefetchi -mraoint -mamx-complex -mavxvnniint16 -msm3 -msha512 -msm4 -mapxf
--musermsr -mavx10.1 -mavx10.1-256 -mavx10.1-512
+-musermsr -mavx10.1 -mavx10.1-256 -mavx10.1-512 -mevex512
-mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops
-minline-stringops-dynamically -mstringop-strategy=@var{alg}
-mkl -mwidekl
@@ -35280,6 +35280,11 @@ To invoke egpr usage in inline asm, use new compiler option
-mapx-inline-asm-use-gpr32 and user should ensure the instruction
supports EGPR.
+@opindex mevex512
+@item -mevex512
+@itemx -mno-evex512
+Enables/disables 512-bit vector. It will be default on if AVX512F is enabled.
+
@end table
These @samp{-m} switches are supported in addition to the above
--
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