diff --git a/gcc/config/bpf/bpf.cc b/gcc/config/bpf/bpf.cc
index 18d3b5f14d6a4692ad695ba6605eac2b1f35ca4f..55b6927a62f62324874908de8c6eceafefd38f80 100644
--- a/gcc/config/bpf/bpf.cc
+++ b/gcc/config/bpf/bpf.cc
@@ -256,6 +256,9 @@ bpf_option_override (void)
   if (bpf_has_bswap == -1)
     bpf_has_bswap = (bpf_isa >= ISA_V4);
 
+  if (bpf_has_sdiv == -1)
+    bpf_has_sdiv = (bpf_isa >= ISA_V4);
+
   /* Disable -fstack-protector as it is not supported in BPF.  */
   if (flag_stack_protect)
     {
diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md
index 81e2268c400edf68f4ff03951e0251d291cf5def..3e2d760fbe4539c99797b5baf8771f9b9419a0b5 100644
--- a/gcc/config/bpf/bpf.md
+++ b/gcc/config/bpf/bpf.md
@@ -167,8 +167,8 @@
 
 ;;; Division
 
-;; Note that eBPF doesn't provide instructions for signed integer
-;; division.
+;; Note that eBPF <= V3 doesn't provide instructions for signed
+;; integer division.
 
 (define_insn "udiv<AM:mode>3"
   [(set (match_operand:AM 0 "register_operand" "=r,r")
@@ -178,20 +178,20 @@
   "{div<msuffix>\t%0,%2|%w0 /= %w2}"
   [(set_attr "type" "<mtype>")])
 
-;; However, xBPF does provide a signed division operator, sdiv.
+;; However, BPF V4 does provide a signed division operator, sdiv.
 
 (define_insn "div<AM:mode>3"
   [(set (match_operand:AM 0 "register_operand" "=r,r")
         (div:AM (match_operand:AM 1 "register_operand" " 0,0")
                 (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
-  "TARGET_XBPF"
+  "bpf_has_sdiv"
   "{sdiv<msuffix>\t%0,%2|%w0 s/= %w2}"
   [(set_attr "type" "<mtype>")])
 
 ;;; Modulus
 
-;; Note that eBPF doesn't provide instructions for signed integer
-;; remainder.
+;; Note that eBPF <= V3 doesn't provide instructions for signed
+;; integer remainder.
 
 (define_insn "umod<AM:mode>3"
   [(set (match_operand:AM 0 "register_operand" "=r,r")
@@ -201,13 +201,13 @@
   "{mod<msuffix>\t%0,%2|%w0 %%= %w2}"
   [(set_attr "type" "<mtype>")])
 
-;; Again, xBPF provides a signed version, smod.
+;; However, BPF V4 does provide a signed modulus operator, smod.
 
 (define_insn "mod<AM:mode>3"
   [(set (match_operand:AM 0 "register_operand" "=r,r")
         (mod:AM (match_operand:AM 1 "register_operand" " 0,0")
                 (match_operand:AM 2 "reg_or_imm_operand" "r,I")))]
-  "TARGET_XBPF"
+  "bpf_has_sdiv"
   "{smod<msuffix>\t%0,%2|%w0 s%%= %w2}"
   [(set_attr "type" "<mtype>")])
 
diff --git a/gcc/config/bpf/bpf.opt b/gcc/config/bpf/bpf.opt
index 3bf9033279bfe80fb98a7b547417200a0784bbbd..bd35f8dbd0ce19d3224827f2aa2bfd2f74a49cdf 100644
--- a/gcc/config/bpf/bpf.opt
+++ b/gcc/config/bpf/bpf.opt
@@ -63,6 +63,10 @@ mbswap
 Target Var(bpf_has_bswap) Init(-1)
 Enable byte swap instructions.
 
+msdiv
+Target Var(bpf_has_sdiv) Init(-1)
+Enable signed division and modulus instructions.
+
 mcpu=
 Target RejectNegative Joined Var(bpf_isa) Enum(bpf_isa) Init(ISA_V4)
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index a977a34db427f9b47e312a81917e6774d4ea6c05..fa765d5a0dd9724bd43bf5d072e0dc85a23e1237 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -24711,6 +24711,11 @@ Enable 32-bit ALU instructions. Enabled for CPU v3 and above.
 @item -mbswap
 Enable byte swap instructions.  Enabled for CPU v4 and above.
 
+@opindex msdiv
+@item -msdiv
+Enable signed division and modulus instructions.  Enabled for CPU v4
+and above.
+
 @opindex mcpu
 @item -mcpu=@var{version}
 This specifies which version of the eBPF ISA to target. Newer versions
diff --git a/gcc/testsuite/gcc.target/bpf/diag-sdiv.c b/gcc/testsuite/gcc.target/bpf/diag-sdiv.c
index db0c494a789c9b3ccc4d26cfdd781e7a7cceb5be..c48bbf03df976ef8ce875fa9692fc1396fecfd1e 100644
--- a/gcc/testsuite/gcc.target/bpf/diag-sdiv.c
+++ b/gcc/testsuite/gcc.target/bpf/diag-sdiv.c
@@ -1,6 +1,6 @@
 /* Verify signed division does not produce 'sdiv' insn in eBPF.  */
 /* { dg-do compile } */
-/* { dg-options "-O0" } */
+/* { dg-options "-O0 -mcpu=v3" } */
 
 void
 foo ()
diff --git a/gcc/testsuite/gcc.target/bpf/diag-smod.c b/gcc/testsuite/gcc.target/bpf/diag-smod.c
index 20234ee39cc79fbcf2ed863d9875fed2099292b9..d3df308217f3322ecb0c97599c0ad604a218fc3e 100644
--- a/gcc/testsuite/gcc.target/bpf/diag-smod.c
+++ b/gcc/testsuite/gcc.target/bpf/diag-smod.c
@@ -1,6 +1,6 @@
 /* Verify signed modulo does not produce 'smod' insn in eBPF.  */
 /* { dg-do compile } */
-/* { dg-options "-O0" } */
+/* { dg-options "-O0 -mcpu=v3" } */
 
 void
 foo ()
diff --git a/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c b/gcc/testsuite/gcc.target/bpf/sdiv-1.c
similarity index 86%
rename from gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c
rename to gcc/testsuite/gcc.target/bpf/sdiv-1.c
index f6c5c9e9f1c78f8163b3a9df9ed8702d4d305030..ad75b044e1d06917b077065dab29de6dda7aa292 100644
--- a/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c
+++ b/gcc/testsuite/gcc.target/bpf/sdiv-1.c
@@ -1,6 +1,6 @@
 /* Verify that sdiv instruction is used for xBPF. */
 /* { dg-do compile } */
-/* { dg-options "-O0 -mxbpf" } */
+/* { dg-options "-O0 -mcpu=v4" } */
 
 void
 foo ()
diff --git a/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c b/gcc/testsuite/gcc.target/bpf/smod-1.c
similarity index 86%
rename from gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c
rename to gcc/testsuite/gcc.target/bpf/smod-1.c
index b3e5816b5cf4bb957fe52af6a7ba889538fbd613..c5fc6f7d4b20140b16c89714e92e24327f48633f 100644
--- a/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c
+++ b/gcc/testsuite/gcc.target/bpf/smod-1.c
@@ -1,6 +1,6 @@
 /* Verify that smod instruction is used for xBPF. */
 /* { dg-do compile } */
-/* { dg-options "-O0 -mxbpf" } */
+/* { dg-options "-O0 -mcpu=v4" } */
 
 void
 foo ()