diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index f78fc0a60e2e9cc7f8e5c447e541945540437fda..315db854862dd8aa21ea24d96475ca8273a0ebf8 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -82,7 +82,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA2_AVX5124FMAPS_SET OPTION_MASK_ISA2_AVX5124FMAPS
#define OPTION_MASK_ISA2_AVX5124VNNIW_SET OPTION_MASK_ISA2_AVX5124VNNIW
#define OPTION_MASK_ISA_AVX512VBMI2_SET \
- (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512F_SET)
+ (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW_SET)
#define OPTION_MASK_ISA_AVX512FP16_SET OPTION_MASK_ISA_AVX512BW_SET
#define OPTION_MASK_ISA2_AVX512FP16_SET OPTION_MASK_ISA2_AVX512FP16
#define OPTION_MASK_ISA_AVX512VNNI_SET \
@@ -232,7 +232,6 @@ along with GCC; see the file COPYING3. If not see
| OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
| OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
| OPTION_MASK_ISA_AVX512VL_UNSET | OPTION_MASK_ISA_AVX512IFMA_UNSET \
- | OPTION_MASK_ISA_AVX512VBMI2_UNSET \
| OPTION_MASK_ISA_AVX512VNNI_UNSET \
| OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET)
#define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
@@ -241,7 +240,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
#define OPTION_MASK_ISA_AVX512BW_UNSET \
(OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET \
- | OPTION_MASK_ISA_AVX512BITALG_UNSET)
+ | OPTION_MASK_ISA_AVX512VBMI2_UNSET | OPTION_MASK_ISA_AVX512BITALG_UNSET)
#define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
#define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
#define OPTION_MASK_ISA2_AVXIFMA_UNSET OPTION_MASK_ISA2_AVXIFMA
diff --git a/gcc/config/i386/avx512vbmi2intrin.h b/gcc/config/i386/avx512vbmi2intrin.h
index 528d1935296ba46c7984ec602430e42a0fec6dc8..ca00f8a5f14188b26da1e83bc2222fd249df096d 100644
--- a/gcc/config/i386/avx512vbmi2intrin.h
+++ b/gcc/config/i386/avx512vbmi2intrin.h
@@ -326,18 +326,6 @@ _mm512_maskz_shldv_epi64 (__mmask8 __A, __m512i __B, __m512i __C, __m512i __D)
(__v8di) __D, (__mmask8)__A);
}
-#ifdef __DISABLE_AVX512VBMI2__
-#undef __DISABLE_AVX512VBMI2__
-
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMI2__ */
-
-#if !defined(__AVX512VBMI2__) || !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512vbmi2,avx512bw")
-#define __DISABLE_AVX512VBMI2BW__
-#endif /* __AVX512VBMI2BW__ */
-
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_compress_epi8 (__m512i __A, __mmask64 __B, __m512i __C)
@@ -548,10 +536,10 @@ _mm512_maskz_shldv_epi16 (__mmask32 __A, __m512i __B, __m512i __C, __m512i __D)
(__v32hi) __C, (__v32hi) __D, (__mmask32)__A);
}
-#ifdef __DISABLE_AVX512VBMI2BW__
-#undef __DISABLE_AVX512VBMI2BW__
+#ifdef __DISABLE_AVX512VBMI2__
+#undef __DISABLE_AVX512VBMI2__
#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMI2BW__ */
+#endif /* __DISABLE_AVX512VBMI2__ */
#endif /* __AVX512VBMI2INTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/avx512vbmi2vlintrin.h b/gcc/config/i386/avx512vbmi2vlintrin.h
index 86efca2b227e910e72fb0c4b84b3d745fae78118..92cae8cf02b2ab0afeefd9572e1d4a33a8d80e57 100644
--- a/gcc/config/i386/avx512vbmi2vlintrin.h
+++ b/gcc/config/i386/avx512vbmi2vlintrin.h
@@ -957,21 +957,6 @@ _mm_maskz_shldv_epi64 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
(__v2di) __D, (__mmask8)__A);
}
-
-
-
-#ifdef __DISABLE_AVX512VBMI2VL__
-#undef __DISABLE_AVX512VBMI2VL__
-#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMIVL__ */
-
-#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__) || \
- !defined(__AVX512BW__)
-#pragma GCC push_options
-#pragma GCC target("avx512vbmi2,avx512vl,avx512bw")
-#define __DISABLE_AVX512VBMI2VLBW__
-#endif /* __AVX512VBMIVLBW__ */
-
extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_compress_epi8 (__m256i __A, __mmask32 __B, __m256i __C)
@@ -1029,9 +1014,9 @@ _mm256_maskz_expandloadu_epi8 (__mmask32 __A, const void * __B)
(__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
}
-#ifdef __DISABLE_AVX512VBMI2VLBW__
-#undef __DISABLE_AVX512VBMI2VLBW__
+#ifdef __DISABLE_AVX512VBMI2VL__
+#undef __DISABLE_AVX512VBMI2VL__
#pragma GCC pop_options
-#endif /* __DISABLE_AVX512VBMIVLBW__ */
+#endif /* __DISABLE_AVX512VBMIVL__ */
#endif /* _AVX512VBMIVLINTRIN_H_INCLUDED */
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def
index 4134183002237194aefdb8ede99c00b5802e9bb9..f7b10a6ab1e02d9b5663b9e4d16ba9b53b99b4d6 100644
--- a/gcc/config/i386/i386-builtin.def
+++ b/gcc/config/i386/i386-builtin.def
@@ -430,20 +430,20 @@ BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru", IX86_B
BDESC (OPTION_MASK_ISA_PKU, 0, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED)
/* VBMI2 */
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev64qi_mask, "__builtin_ia32_compressstoreuqi512_mask", IX86_BUILTIN_PCOMPRESSBSTORE512, UNKNOWN, (int) VOID_FTYPE_PV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressstorev32hi_mask, "__builtin_ia32_compressstoreuhi512_mask", IX86_BUILTIN_PCOMPRESSWSTORE512, UNKNOWN, (int) VOID_FTYPE_PV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev32qi_mask, "__builtin_ia32_compressstoreuqi256_mask", IX86_BUILTIN_PCOMPRESSBSTORE256, UNKNOWN, (int) VOID_FTYPE_PV32QI_V32QI_USI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16qi_mask, "__builtin_ia32_compressstoreuqi128_mask", IX86_BUILTIN_PCOMPRESSBSTORE128, UNKNOWN, (int) VOID_FTYPE_PV16QI_V16QI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev16hi_mask, "__builtin_ia32_compressstoreuhi256_mask", IX86_BUILTIN_PCOMPRESSWSTORE256, UNKNOWN, (int) VOID_FTYPE_PV16HI_V16HI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressstorev8hi_mask, "__builtin_ia32_compressstoreuhi128_mask", IX86_BUILTIN_PCOMPRESSWSTORE128, UNKNOWN, (int) VOID_FTYPE_PV8HI_V8HI_UQI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandloadqi512_mask", IX86_BUILTIN_PEXPANDBLOAD512, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandloadqi512_maskz", IX86_BUILTIN_PEXPANDBLOAD512Z, UNKNOWN, (int) V64QI_FTYPE_PCV64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandloadhi512_mask", IX86_BUILTIN_PEXPANDWLOAD512, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandloadhi512_maskz", IX86_BUILTIN_PEXPANDWLOAD512Z, UNKNOWN, (int) V32HI_FTYPE_PCV32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandloadqi256_mask", IX86_BUILTIN_PEXPANDBLOAD256, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandloadqi256_maskz", IX86_BUILTIN_PEXPANDBLOAD256Z, UNKNOWN, (int) V32QI_FTYPE_PCV32QI_V32QI_USI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandloadhi256_mask", IX86_BUILTIN_PEXPANDWLOAD256, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_maskz, "__builtin_ia32_expandloadhi256_maskz", IX86_BUILTIN_PEXPANDWLOAD256Z, UNKNOWN, (int) V16HI_FTYPE_PCV16HI_V16HI_UHI)
@@ -2553,18 +2553,18 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512
BDESC (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_avx512vl_vpermi2varv16qi3_mask, "__builtin_ia32_vpermi2varqi128_mask", IX86_BUILTIN_VPERMI2VARQI128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_V16QI_UHI)
/* VBMI2 */
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv64qi_mask, "__builtin_ia32_compressqi512_mask", IX86_BUILTIN_PCOMPRESSB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_compressv32hi_mask, "__builtin_ia32_compresshi512_mask", IX86_BUILTIN_PCOMPRESSW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv32qi_mask, "__builtin_ia32_compressqi256_mask", IX86_BUILTIN_PCOMPRESSB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16qi_mask, "__builtin_ia32_compressqi128_mask", IX86_BUILTIN_PCOMPRESSB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv16hi_mask, "__builtin_ia32_compresshi256_mask", IX86_BUILTIN_PCOMPRESSW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_compressv8hi_mask, "__builtin_ia32_compresshi128_mask", IX86_BUILTIN_PCOMPRESSW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_mask, "__builtin_ia32_expandqi512_mask", IX86_BUILTIN_PEXPANDB512, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv64qi_maskz, "__builtin_ia32_expandqi512_maskz", IX86_BUILTIN_PEXPANDB512Z, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI_UDI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_mask, "__builtin_ia32_expandhi512_mask", IX86_BUILTIN_PEXPANDW512, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_expandv32hi_maskz, "__builtin_ia32_expandhi512_maskz", IX86_BUILTIN_PEXPANDW512Z, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_mask, "__builtin_ia32_expandqi256_mask", IX86_BUILTIN_PEXPANDB256, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv32qi_maskz, "__builtin_ia32_expandqi256_maskz", IX86_BUILTIN_PEXPANDB256Z, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI_USI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_mask, "__builtin_ia32_expandqi128_mask", IX86_BUILTIN_PEXPANDB128, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16qi_maskz, "__builtin_ia32_expandqi128_maskz", IX86_BUILTIN_PEXPANDB128Z, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv16hi_mask, "__builtin_ia32_expandhi256_mask", IX86_BUILTIN_PEXPANDW256, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_UHI)
@@ -2572,7 +2572,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expan
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_mask, "__builtin_ia32_expandhi128_mask", IX86_BUILTIN_PEXPANDW128, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_expandv8hi_maskz, "__builtin_ia32_expandhi128_maskz", IX86_BUILTIN_PEXPANDW128Z, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_UQI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi, "__builtin_ia32_vpshrd_v32hi", IX86_BUILTIN_VPSHRDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrd_v32hi_mask, "__builtin_ia32_vpshrd_v32hi_mask", IX86_BUILTIN_VPSHRDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi, "__builtin_ia32_vpshrd_v16hi", IX86_BUILTIN_VPSHRDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v16hi_mask, "__builtin_ia32_vpshrd_v16hi_mask", IX86_BUILTIN_VPSHRDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v8hi, "__builtin_ia32_vpshrd_v8hi", IX86_BUILTIN_VPSHRDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
@@ -2590,7 +2590,7 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di, "__builtin_ia32_vpshrd_v2di", IX86_BUILTIN_VPSHRDV2DI, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrd_v2di_mask, "__builtin_ia32_vpshrd_v2di_mask", IX86_BUILTIN_VPSHRDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi, "__builtin_ia32_vpshld_v32hi", IX86_BUILTIN_VPSHLDV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshld_v32hi_mask, "__builtin_ia32_vpshld_v32hi_mask", IX86_BUILTIN_VPSHLDV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_INT_V32HI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi, "__builtin_ia32_vpshld_v16hi", IX86_BUILTIN_VPSHLDV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v16hi_mask, "__builtin_ia32_vpshld_v16hi_mask", IX86_BUILTIN_VPSHLDV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_INT_V16HI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v8hi, "__builtin_ia32_vpshld_v8hi", IX86_BUILTIN_VPSHLDV8HI, UNKNOWN, (int) V8HI_FTYPE_V8HI_V8HI_INT)
@@ -2609,8 +2609,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshl
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshld_v2di_mask, "__builtin_ia32_vpshld_v2di_mask", IX86_BUILTIN_VPSHLDV2DI_MASK, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_INT_V2DI_INT)
BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi, "__builtin_ia32_vpshrdv_v32hi", IX86_BUILTIN_VPSHRDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_mask, "__builtin_ia32_vpshrdv_v32hi_mask", IX86_BUILTIN_VPSHRDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshrdv_v32hi_maskz, "__builtin_ia32_vpshrdv_v32hi_maskz", IX86_BUILTIN_VPSHRDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi, "__builtin_ia32_vpshrdv_v16hi", IX86_BUILTIN_VPSHRDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_mask, "__builtin_ia32_vpshrdv_v16hi_mask", IX86_BUILTIN_VPSHRDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v16hi_maskz, "__builtin_ia32_vpshrdv_v16hi_maskz", IX86_BUILTIN_VPSHRDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
@@ -2637,8 +2637,8 @@ BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshr
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshrdv_v2di_maskz, "__builtin_ia32_vpshrdv_v2di_maskz", IX86_BUILTIN_VPSHRDVV2DI_MASKZ, UNKNOWN, (int) V2DI_FTYPE_V2DI_V2DI_V2DI_UQI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi, "__builtin_ia32_vpshldv_v32hi", IX86_BUILTIN_VPSHLDVV32HI, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
-BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512BW, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_mask, "__builtin_ia32_vpshldv_v32hi_mask", IX86_BUILTIN_VPSHLDVV32HI_MASK, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
+BDESC (OPTION_MASK_ISA_AVX512VBMI2, 0, CODE_FOR_vpshldv_v32hi_maskz, "__builtin_ia32_vpshldv_v32hi_maskz", IX86_BUILTIN_VPSHLDVV32HI_MASKZ, UNKNOWN, (int) V32HI_FTYPE_V32HI_V32HI_V32HI_USI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi, "__builtin_ia32_vpshldv_v16hi", IX86_BUILTIN_VPSHLDVV16HI, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_mask, "__builtin_ia32_vpshldv_v16hi_mask", IX86_BUILTIN_VPSHLDVV16HI_MASK, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
BDESC (OPTION_MASK_ISA_AVX512VBMI2 | OPTION_MASK_ISA_AVX512VL, 0, CODE_FOR_vpshldv_v16hi_maskz, "__builtin_ia32_vpshldv_v16hi_maskz", IX86_BUILTIN_VPSHLDVV16HI_MASKZ, UNKNOWN, (int) V16HI_FTYPE_V16HI_V16HI_V16HI_UHI)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 260dfa12b0f536d68fa539aaefafd3ba7250154c..b5236ad8ee8a76cb7a6c45854c6ac3a3afe83521 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -274,12 +274,6 @@
V32HF (V16HF "TARGET_AVX512VL") (V8HF "TARGET_AVX512VL")
V32BF (V16BF "TARGET_AVX512VL") (V8BF "TARGET_AVX512VL")])
-;; Same iterator, but without supposed TARGET_AVX512BW
-(define_mode_iterator VI12_AVX512VLBW
- [(V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
- (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
- (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
-
(define_mode_iterator VI1_AVX512VL
[V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")])
@@ -862,16 +856,15 @@
(V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
(V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
(V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")])
-(define_mode_iterator VI12_VI48F_AVX512VLBW
+(define_mode_iterator VI12_VI48F_AVX512VL
[(V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
(V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")
(V8SI "TARGET_AVX512VL") (V8SF "TARGET_AVX512VL")
(V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")
(V4SI "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL")
(V2DI "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")
- (V64QI "TARGET_AVX512BW") (V16QI "TARGET_AVX512VL")
- (V32QI "TARGET_AVX512VL && TARGET_AVX512BW") (V32HI "TARGET_AVX512BW")
- (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
+ V64QI (V16QI "TARGET_AVX512VL") (V32QI "TARGET_AVX512VL")
+ V32HI (V16HI "TARGET_AVX512VL") (V8HI "TARGET_AVX512VL")])
(define_mode_iterator VI48F_256 [V8SI V8SF V4DI V4DF])
@@ -27454,10 +27447,10 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn "compress<mode>_mask"
- [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v")
- (unspec:VI12_AVX512VLBW
- [(match_operand:VI12_AVX512VLBW 1 "register_operand" "v")
- (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C")
+ [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
+ (unspec:VI12_AVX512VL
+ [(match_operand:VI12_AVX512VL 1 "register_operand" "v")
+ (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C")
(match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")]
UNSPEC_COMPRESS))]
"TARGET_AVX512VBMI2"
@@ -27481,9 +27474,9 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn "compressstore<mode>_mask"
- [(set (match_operand:VI12_AVX512VLBW 0 "memory_operand" "=m")
- (unspec:VI12_AVX512VLBW
- [(match_operand:VI12_AVX512VLBW 1 "register_operand" "x")
+ [(set (match_operand:VI12_AVX512VL 0 "memory_operand" "=m")
+ (unspec:VI12_AVX512VL
+ [(match_operand:VI12_AVX512VL 1 "register_operand" "x")
(match_dup 0)
(match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")]
UNSPEC_COMPRESS_STORE))]
@@ -27519,10 +27512,10 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn "expand<mode>_mask"
- [(set (match_operand:VI12_AVX512VLBW 0 "register_operand" "=v,v")
- (unspec:VI12_AVX512VLBW
- [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand" "v,m")
- (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand" "0C,0C")
+ [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v,v")
+ (unspec:VI12_AVX512VL
+ [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "v,m")
+ (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand" "0C,0C")
(match_operand:<avx512fmaskmode> 3 "register_operand" "Yk,Yk")]
UNSPEC_EXPAND))]
"TARGET_AVX512VBMI2"
@@ -27533,10 +27526,10 @@
(set_attr "mode" "<sseinsnmode>")])
(define_insn_and_split "*expand<mode>_mask"
- [(set (match_operand:VI12_VI48F_AVX512VLBW 0 "register_operand")
- (unspec:VI12_VI48F_AVX512VLBW
- [(match_operand:VI12_VI48F_AVX512VLBW 1 "nonimmediate_operand")
- (match_operand:VI12_VI48F_AVX512VLBW 2 "nonimm_or_0_operand")
+ [(set (match_operand:VI12_VI48F_AVX512VL 0 "register_operand")
+ (unspec:VI12_VI48F_AVX512VL
+ [(match_operand:VI12_VI48F_AVX512VL 1 "nonimmediate_operand")
+ (match_operand:VI12_VI48F_AVX512VL 2 "nonimm_or_0_operand")
(match_operand 3 "const_int_operand")]
UNSPEC_EXPAND))]
"ix86_pre_reload_split ()
@@ -27589,10 +27582,10 @@
})
(define_expand "expand<mode>_maskz"
- [(set (match_operand:VI12_AVX512VLBW 0 "register_operand")
- (unspec:VI12_AVX512VLBW
- [(match_operand:VI12_AVX512VLBW 1 "nonimmediate_operand")
- (match_operand:VI12_AVX512VLBW 2 "nonimm_or_0_operand")
+ [(set (match_operand:VI12_AVX512VL 0 "register_operand")
+ (unspec:VI12_AVX512VL
+ [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand")
+ (match_operand:VI12_AVX512VL 2 "nonimm_or_0_operand")
(match_operand:<avx512fmaskmode> 3 "register_operand")]
UNSPEC_EXPAND))]
"TARGET_AVX512VBMI2"
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
index ce83d63bc73ca27fc4672831ff1ed8bba20c401f..33af0d92925bfd740738a34e0be951025a68ab02 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512bw -mavx512vbmi2 -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
index 424b485a203d8c27968a8fd695b151867c6f8783..161c21783498d9ebd38f18e41f4ce1af7964a86e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-b-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
index 24790b20cf15f442958737c15dd26f8cb060710a..c7416dab97b316da161499abef3ac0b9723699f5 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-d-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
index 119b50e6f7946b0027de59f7d54f43de86bd22fc..797ee902510ea21a396c9843209e2640154c7382 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-q-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
index 926e04d4df6ac5b343aae244fc2e4cef69f8b142..94660f26993682161cca28a70ca195ae27ddb49b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr100267-w-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
index c449d9536b9f71ed90cc42739260716c8616362c..0ee8fe472e7d25c16cd0c5e1edafdcd81ab40452 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
index 4f159630504f899591033e41bcaf040202605bd6..773fce21ccf9916e74f8c2091fdcc65884ab9ef6 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressb-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
index 2da92a4758bc45ec8025185ecf1e4b80e8c2f57b..11f4ba447230a5aab8ec3f3c5507abdb613fe74b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpcompressw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
index 20da53944fbb86bcc39dd36496f866c1f22e5815..45866b6f4b993bd4836ceeeb6c0825a73a07dd10 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpcompressw-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
index fb0c58e428fd55c50ab75a958edbdb87e6152fb7..ed96b539982cc0dfe3d110c8ea2343c3264923c5 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
index 0105ddbe20e6fb8c39cc769a2f5fc1ecf49728b7..88dc48c7aebe2171fe11dcfbec2d16a9c0136531 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandb-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
index 49d9fb89acf7d7bc0c4190f444709bd6e2f7d336..9f5688184932a07555aa307a9c022be0326a62c7 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512f -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\(]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
index fdad38b68131e4545e5adcc38d7e54acd08b8204..5c090a3756d47a275b016ff5dbe7a9f086f1c724 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpexpandw-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
index f465ce2d077e14dfb8b73dbdefc44e47d98cb003..f9c250086e4e557ce04a4fb2855beaf51599855c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshld-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
index 5ddf49376ca6c5bc1b1c824db3dd894925653423..4c700f11e68a821825efa9393f53821cb36d7962 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldd-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
index 0377aaa19e805d566de8d38e7a8a1789e28378e6..1d23759428d58dc9e464214a4d7362b1d44eda5a 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldq-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
index 3427b046a0524e5807ec1a6ae1fb99b21e86e9e3..6b1dd1662ee3359c1effaab073a3cc87ab37af5e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldv-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
index 463707523271bfc996bf80e69b8dcf6644e7fb11..a38869e06546d0643215727816f62abacee0ed15 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvd-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
index 4436f012b65a616b7ff4c9e49dbac1d4433b59b8..2eeb349f71fc4bff47cbbce948278cff83989dcb 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvq-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
index 5473a5741467f10d5295b4043425cddf2ac44719..6a31a4ddf062fd73d68752d280856bd3bda16b5e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshldvw-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
index 54dd369942b0ad502104390306c92be034554a82..2c3a42955e18e6079aef4ab97998a80cfda39d06 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdd-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
index 4997c70a7b627a9ba58793822293ed0a05646f0e..89bafc3d8c4dead43a65da0b08cb7d31ebad11bc 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdq-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
index 6dd3f0fa2b79caac1caa5c618c4c766e5ddaa754..5e12470f6403a29bdaafcb6304f2488749b8bb89 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdv-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512f -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
index 6e08095eade52f5a80f5c7c86d585414d7060756..d2805795a08d2ba92a9c2602de7b9fd403974226 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvd-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
index 5810fa06e4cac1269801e4e788fa5261e0c3aece..44378a6b35ce0f3f4dbebfcb6dc601d3f27d7bda 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvq-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
index 1699c26248302c1ecf0f0b669e2af930da4afcae..c7131a08444d7cb5611ce66c732f03187a228654 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdvw-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512bw -mavx512vbmi2" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
index 67596eb7613ab435735be9ba4e1e9e291122ecfd..2dab24518bd0eb0db70068995d8246ebcc4866ad 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpshrdw-2.c
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512f -mavx512vbmi2 -mavx512bw" } */
-/* { dg-require-effective-target avx512f } */
+/* { dg-options "-O2 -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vbmi2 } */
#define AVX512F
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
index 0b29923b7217b59856f68ab6b1e55cea8ecbd136..a61ff98ea66d66a47d44a5b718cb6edcae59e420 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshld-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
index bb4de7852443d30db75d49db2270efcf7aeaa6ba..7bf59672dca322b80253709527120c70a8f1b963 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vbmi2-vpshrd-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshrdw\[ \\t\]+\[^\{\n\]*\\\$3\[^\n\r]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
index 7e3aef9c782f7ec06dab208aa37c986e1d8899ce..ce4410ad852162f61d67a37a2c4729e05a656af6 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpcompressb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
index e6207721cbdce565626d82469eab5b6995460238..dc65a21285cdf5e81bb982900302e79599d7c0cb 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressb-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
index 012ac10393d7da19607b49a7488236567a5cc984..a56c1b950fe0602d5145f86622f41524419dbb5b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcompressw-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
index 96e0d815f132caa4e99f5133e1a846f697ee1bb3..5600bd4be6be6eeb8bf8b0c42444bced8d604996 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
index 280aedad1358cb743b000302e8c680b1aad0c4b4..3a3bed690a1b16c0cccf4db1009202077b01d646 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandb-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
index ac5c34a0f425de04cb55bc1fedde42ff35474492..9a897eccfa8ec2498995d4d878f39d317f758c6c 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vbmi2 -mavx512bw -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
index 2c1e00457cc45c3d4a0cefe504ef01822d8d9ccf..48ec1a9ea0b3b8ac09398883d30e0becfec5b33b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpexpandw-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
index d47e4e61707480873e6249f24dc9ece06952d869..99d5154a1c5d4167f1c595570f8cf6a46a834811 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldd-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
index 7a5575e41a1b32833d775057a87e0ae079be2d34..a95b443b744f237f5dc26ebecf6744c8528dfde3 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldq-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
index 95695527b47b94d0c84e741c106608d6f4564b24..79248e0281ec62dbef1e8258cd8e634d13147aa4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldv-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshldvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
index cd2c751ba810f42b4dac8486c0e627822eab837b..58481c4e1a4771b1f91aa472787f1218a2a027de 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvd-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
index 451487de6be7862b87c8c3fd088421ee81c0c9c8..54e8193f19f6d9403f8a7eb288f9f294fcebaa93 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvq-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
index fa593f5d5ba968c79a84f151135a58acadad9592..8d8100774512cba2b6728694962d8789f02c8d2e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshldvw-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
index bf229155a0274f58cfa82cb26348ca7e8ea8e2fc..3b2c29d02d64294ab95e64b04236eb7a2e566685 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdd-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
index 61e0708797bb9cda03c409bb059fdc6c439f7938..02adfbf4189b0c076fbb46005d4b4878f4c0586e 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdq-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
index 4e6ceb2787ab3ffe46c5df4fb0e92f1f213ccea9..243878c853e311c3f8ed014ab7bb6735f991340d 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdv-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512vl -mavx512vbmi2 -mavx512bw -O2" } */
+/* { dg-options "-mavx512vl -mavx512vbmi2 -O2" } */
/* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpshrdvw\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
index 6d8ab79bcad3b64d74e97d4350cef762ba277da3..a9e47ba64ac3dfd783f3443a8d3d3a73bd290a40 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvd-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
index da74a62c7240d98f9fb920a46ce0177c095c3fb7..9b4f2f2d17eb5c69693601650a3236753342ccd7 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvq-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
index 50a3c00c640c2b10f1425764f20639679c7b8687..2b161fceeeddb4a17a753bcddd4546218b1eb402 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdvw-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
index 507034b2288b4a20f5a4ea0c2ac104a6bd60bd05..bfb32afb2f91a321909ae1babcc08e2cfb2ac6b3 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpshrdw-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512bw -mavx512vbmi2" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
index 135dbd7577ebf3bb4b22d0c82ed7d28f50a5efee..2f7d5158c4d50d4d30a2587ebe7a9d62b5bd898b 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-mavx512bw -mavx512vbmi2 -mavx512vl -O2" } */
+/* { dg-options "-mavx512vbmi2 -mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandb\[ \\t\]+\[^\{\n\(]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpexpandw\[ \\t\]+\[^\{\n\]*\\(\[^\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
index d54e8033a25816d5891e752c69195964693f3d7b..688d1be893cbba59fa9e69c482b6963bfa58d7fd 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-b-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
index a46ca78a62187a19cede90dbeffe9c55340f9315..ed061a92fc984362636a6bc3eaeb00ba406b61b4 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr100267-w-2.c
@@ -1,5 +1,5 @@
/* { dg-do run } */
-/* { dg-options "-O2 -mavx512vl -mavx512vbmi2 -mavx512bw" } */
+/* { dg-options "-O2 -mavx512vl -mavx512vbmi2" } */
/* { dg-require-effective-target avx512vl } */
/* { dg-require-effective-target avx512vbmi2 } */