From 5116a5d2abdb71def512bf9ec6255f3a511d5e41 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu@codesourcery.com>
Date: Fri, 30 Sep 2005 15:36:26 +0000
Subject: [PATCH] tree-vect-transform.c, [...]: Fix comment typos.
* tree-vect-transform.c, config/ms1/ms1.md,
config/s390/s390.c, config/v850/v850.md: Fix comment typos.
Follow spelling conventions.
* doc/invoke.texi, doc/md.texi: Fix typos.
From-SVN: r104817
---
gcc/ChangeLog | 7 +++++++
gcc/config/ms1/ms1.md | 4 ++--
gcc/config/s390/s390.c | 2 +-
gcc/config/v850/v850.md | 2 +-
gcc/doc/invoke.texi | 2 +-
gcc/doc/md.texi | 8 ++++----
gcc/tree-vect-transform.c | 2 +-
7 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6ff4c0fdbf97..aaa7c8cbac04 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2005-09-30 Kazu Hirata <kazu@codesourcery.com>
+
+ * tree-vect-transform.c, config/ms1/ms1.md,
+ config/s390/s390.c, config/v850/v850.md: Fix comment typos.
+ Follow spelling conventions.
+ * doc/invoke.texi, doc/md.texi: Fix typos.
+
2005-09-30 Andrew Macleod <amacleod@redat.com>
PR tree-optimization/21430
diff --git a/gcc/config/ms1/ms1.md b/gcc/config/ms1/ms1.md
index df4ca2cf2bc9..22c6b59eab3a 100644
--- a/gcc/config/ms1/ms1.md
+++ b/gcc/config/ms1/ms1.md
@@ -243,7 +243,7 @@
DONE;
}
- /* If the load is a psuedo register in a stack slot, some simplification
+ /* If the load is a pseudo register in a stack slot, some simplification
can be made because the loads are aligned */
if ( (! TARGET_BYTE_ACCESS)
&& (reload_in_progress && GET_CODE (operands[1]) == SUBREG
@@ -417,7 +417,7 @@
DONE;
}
- /* If the load is a psuedo register in a stack slot, some simplification
+ /* If the load is a pseudo register in a stack slot, some simplification
can be made because the loads are aligned */
if ( (reload_in_progress && GET_CODE (operands[1]) == SUBREG
&& GET_CODE (SUBREG_REG (operands[1])) == REG
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index a543e59126eb..5284db160df0 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -1099,7 +1099,7 @@ s390_overlap_p (rtx mem1, rtx mem2, HOST_WIDE_INT size)
Overlapping operations would otherwise be recognized by the S/390 hardware
and would fall back to a slower implementation. Allowing overlapping
operations would lead to slow code but not to wrong code. Therefore we are
- somewhat optimistict if we cannot prove that the memory blocks are
+ somewhat optimistic if we cannot prove that the memory blocks are
overlapping.
That's why we return false here although this may accept operations on
overlapping memory areas. */
diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md
index e67dc40b999a..9b353063410a 100644
--- a/gcc/config/v850/v850.md
+++ b/gcc/config/v850/v850.md
@@ -1309,7 +1309,7 @@
/* Branch to the default label if out of range of the table. */
emit_jump_insn (gen_bgtu (operands[4]));
- /* Disabled because the switch pattern is not being recognised
+ /* Disabled because the switch pattern is not being recognized
properly at the moment. eg. compiling vfscanf.c in newlib. */
if (0 && ! TARGET_BIG_SWITCH && TARGET_V850E)
{
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 814d9d879585..1a5030131e66 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -5912,7 +5912,7 @@ Bound on size of expressions used in the scalar evolutions analyzer.
Large expressions slow the analyzer.
@item vect-max-version-checks
-The maxinum number of runtime checks that can be performed when doing
+The maximum number of runtime checks that can be performed when doing
loop versioning in the vectorizer. See option ftree-vect-loop-version
for more information.
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 38c311debadf..460f24df10a9 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -3086,14 +3086,14 @@ modes.
@cindex @code{reduc_splus_@var{m}} instruction pattern
@item @samp{reduc_splus_@var{m}}
-Compute the sum of the signed elements of a vector. The vector is opernad 1,
-and the scalar result is stored in the least significant bits of opernad 0
+Compute the sum of the signed elements of a vector. The vector is operand 1,
+and the scalar result is stored in the least significant bits of operand 0
(also a vector). The output and input vector should have the same modes.
@cindex @code{reduc_uplus_@var{m}} instruction pattern
@item @samp{reduc_uplus_@var{m}}
-Compute the sum of the unsigned elements of a vector. The vector is opernad 1,
-and the scalar result is stored in the least significant bits of opernad 0
+Compute the sum of the unsigned elements of a vector. The vector is operand 1,
+and the scalar result is stored in the least significant bits of operand 0
(also a vector). The output and input vector should have the same modes.
@cindex @code{vec_shl_@var{m}} instruction pattern
diff --git a/gcc/tree-vect-transform.c b/gcc/tree-vect-transform.c
index bbac6fed52ed..bc37bd2dce4a 100644
--- a/gcc/tree-vect-transform.c
+++ b/gcc/tree-vect-transform.c
@@ -1781,7 +1781,7 @@ vectorizable_load (tree stmt, block_stmt_iterator *bsi, tree *vec_stmt)
the value of the parameter and no global variables are touched
which makes the builtin a "const" function. Requiring the
builtin to have the "const" attribute makes it unnecessary
- to call mark_call_clobbered_vars_to_rename. */
+ to call mark_call_clobbered. */
gcc_assert (TREE_READONLY (builtin_decl));
}
else
--
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