diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2a5d7f5c922e6c300cd4087e566399d3dbad3ef2..6829864d57d4618cec7412a901d88f186c989d6d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,36 @@
+2007-08-16 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*rep_movdi_rex64): Emit "rep" prefix on
+ the same line as the instruction for all asm dialects.
+ (*rep_movsi): Ditto.
+ (*rep_movsi_rex64): Ditto.
+ (*rep_movqi): Ditto.
+ (*rep_movqi_rex64): Ditto.
+ (*rep_stosdi_rex64): Ditto.
+ (*rep_stossi): Ditto.
+ (*rep_stossi_rex64): Ditto.
+ (*rep_stosqi): Ditto.
+ (*rep_stosqi_rex64): Ditto.
+ (*cmpstrnqi_nz_1): Ditto.
+ (*cmpstrnqi_nz_rex_1): Ditto.
+ (*cmpstrnqi_1): Ditto.
+ (*cmpstrnqi_rex_1): Ditto.
+ (*strlenqi_1): Ditto.
+ (*strlenqi_rex_1): Ditto.
+ * config/i386/sync.md (*sync_compare_and_swap<mode>): Emit "lock"
+ prefix on the same line as the instruction for all asm dialects.
+ (sync_double_compare_and_swap<mode>): Ditto.
+ (*sync_double_compare_and_swapdi_pic): Ditto.
+ (*sync_compare_and_swap_cc<mode>): Ditto.
+ (sync_double_compare_and_swap_cc<mode>): Ditto.
+ (*sync_double_compare_and_swap_ccdi_pic): Ditto.
+ (sync_old_add<mode>): Ditto.
+ (sync_add<mode>): Ditto.
+ (sync_sub<mode>): Ditto.
+ (sync_ior<mode>): Ditto.
+ (sync_and<mode>): Ditto.
+ (sync_xor<mode>): Ditto.
+
2007-08-16 Richard Sandiford <richard@codesourcery.com>
PR middle-end/32897
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index cc98b413229ab140831e1172e792bafb2fd3c9b1..b49e9a942645d836a4f79f3564d0ba5f5831b705 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14493,7 +14493,7 @@
[(return)
(unspec [(const_int 0)] UNSPEC_REP)]
"reload_completed"
- "rep {;} ret"
+ "rep{\;| }ret"
[(set_attr "length" "1")
(set_attr "length_immediate" "0")
(set_attr "prefix_rep" "1")
@@ -18311,7 +18311,7 @@
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
- "{rep\;movsq|rep movsq}"
+ "rep movsq"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
@@ -18330,7 +18330,7 @@
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"!TARGET_64BIT"
- "{rep\;movsl|rep movsd}"
+ "rep movs{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
@@ -18349,7 +18349,7 @@
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
- "{rep\;movsl|rep movsd}"
+ "rep movs{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
@@ -18366,7 +18366,7 @@
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"!TARGET_64BIT"
- "{rep\;movsb|rep movsb}"
+ "rep movsb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
@@ -18383,7 +18383,7 @@
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
- "{rep\;movsb|rep movsb}"
+ "rep movsb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
@@ -18563,7 +18563,7 @@
(use (match_operand:DI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
- "{rep\;stosq|rep stosq}"
+ "rep stosq"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
@@ -18580,7 +18580,7 @@
(use (match_operand:SI 2 "register_operand" "a"))
(use (match_dup 4))]
"!TARGET_64BIT"
- "{rep\;stosl|rep stosd}"
+ "rep stos{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
@@ -18597,7 +18597,7 @@
(use (match_operand:SI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
- "{rep\;stosl|rep stosd}"
+ "rep stos{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
@@ -18613,7 +18613,7 @@
(use (match_operand:QI 2 "register_operand" "a"))
(use (match_dup 4))]
"!TARGET_64BIT"
- "{rep\;stosb|rep stosb}"
+ "rep stosb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
@@ -18629,7 +18629,7 @@
(use (match_operand:QI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
- "{rep\;stosb|rep stosb}"
+ "rep stosb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
@@ -18738,7 +18738,7 @@
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (match_operand:SI 2 "register_operand" "=c"))]
"!TARGET_64BIT"
- "repz{\;| }cmpsb"
+ "repz cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
@@ -18753,7 +18753,7 @@
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (match_operand:DI 2 "register_operand" "=c"))]
"TARGET_64BIT"
- "repz{\;| }cmpsb"
+ "repz cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
@@ -18788,7 +18788,7 @@
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (match_operand:SI 2 "register_operand" "=c"))]
"!TARGET_64BIT"
- "repz{\;| }cmpsb"
+ "repz cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
@@ -18806,7 +18806,7 @@
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (match_operand:DI 2 "register_operand" "=c"))]
"TARGET_64BIT"
- "repz{\;| }cmpsb"
+ "repz cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
@@ -18853,7 +18853,7 @@
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT"
- "repnz{\;| }scasb"
+ "repnz scasb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
@@ -18867,7 +18867,7 @@
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT"
- "repnz{\;| }scasb"
+ "repnz scasb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index 853686b4ab2a4dc6d38a21f2cae8200724f9b5d6..7282381c0407d3707174539607245d2442fbcbb1 100644
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -81,7 +81,7 @@
UNSPECV_CMPXCHG_1))
(clobber (reg:CC FLAGS_REG))]
"TARGET_CMPXCHG"
- "lock{\;| }cmpxchg{<modesuffix>\t%3, %1| %1, %3}")
+ "lock cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
(define_insn "sync_double_compare_and_swap<mode>"
[(set (match_operand:DCASMODE 0 "register_operand" "=A")
@@ -95,7 +95,7 @@
UNSPECV_CMPXCHG_1))
(clobber (reg:CC FLAGS_REG))]
""
- "lock{\;| }cmpxchg<doublemodesuffix>b{\t| }%1")
+ "lock cmpxchg<doublemodesuffix>b\t%1")
;; Theoretically we'd like to use constraint "r" (any reg) for operand
;; 3, but that includes ecx. If operand 3 and 4 are the same (like when
@@ -118,7 +118,7 @@
UNSPECV_CMPXCHG_1))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
- "xchg{l}\t%%ebx, %3\;lock{\;| }cmpxchg8b{\t| }%1\;xchg{l}\t%%ebx, %3")
+ "xchg{l}\t%%ebx, %3\;lock cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
(define_expand "sync_compare_and_swap_cc<mode>"
[(parallel
@@ -176,7 +176,7 @@
[(match_dup 1) (match_dup 2) (match_dup 3)] UNSPECV_CMPXCHG_2)
(match_dup 2)))]
"TARGET_CMPXCHG"
- "lock{\;| }cmpxchg{<modesuffix>\t%3, %1| %1, %3}")
+ "lock cmpxchg{<modesuffix>}\t{%3, %1|%1, %3}")
(define_insn "sync_double_compare_and_swap_cc<mode>"
[(set (match_operand:DCASMODE 0 "register_operand" "=A")
@@ -195,7 +195,7 @@
UNSPECV_CMPXCHG_2)
(match_dup 2)))]
""
- "lock{\;| }cmpxchg<doublemodesuffix>b{\t| }%1")
+ "lock cmpxchg<doublemodesuffix>b\t%1")
;; See above for the explanation of using the constraint "SD" for
;; operand 3.
@@ -216,7 +216,7 @@
UNSPECV_CMPXCHG_2)
(match_dup 2)))]
"!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
- "xchg{l}\t%%ebx, %3\;lock{\;| }cmpxchg8b{\t| }%1\;xchg{l}\t%%ebx, %3")
+ "xchg{l}\t%%ebx, %3\;lock cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
(define_insn "sync_old_add<mode>"
[(set (match_operand:IMODE 0 "register_operand" "=<modeconstraint>")
@@ -227,7 +227,7 @@
(match_operand:IMODE 2 "register_operand" "0")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_XADD"
- "lock{\;| }xadd{<modesuffix>\t%0, %1| %1, %0}")
+ "lock xadd{<modesuffix>}\t{%0, %1|%1, %0}")
;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space.
(define_insn "sync_lock_test_and_set<mode>"
@@ -251,12 +251,12 @@
if (TARGET_USE_INCDEC)
{
if (operands[1] == const1_rtx)
- return "lock{\;| }inc{<modesuffix>\t| }%0";
+ return "lock inc{<modesuffix>}\t%0";
if (operands[1] == constm1_rtx)
- return "lock{\;| }dec{<modesuffix>\t| }%0";
+ return "lock dec{<modesuffix>}\t%0";
}
- return "lock{\;| }add{<modesuffix>\t%1, %0| %0, %1}";
+ return "lock add{<modesuffix>}\t{%1, %0|%0, %1}";
})
(define_insn "sync_sub<mode>"
@@ -271,12 +271,12 @@
if (TARGET_USE_INCDEC)
{
if (operands[1] == const1_rtx)
- return "lock{\;| }dec{<modesuffix>\t| }%0";
+ return "lock dec{<modesuffix>}\t%0";
if (operands[1] == constm1_rtx)
- return "lock{\;| }inc{<modesuffix>\t| }%0";
+ return "lock inc{<modesuffix>}\t%0";
}
- return "lock{\;| }sub{<modesuffix>\t%1, %0| %0, %1}";
+ return "lock sub{<modesuffix>}\t{%1, %0|%0, %1}";
})
(define_insn "sync_ior<mode>"
@@ -287,7 +287,7 @@
UNSPECV_LOCK))
(clobber (reg:CC FLAGS_REG))]
""
- "lock{\;| }or{<modesuffix>\t%1, %0| %0, %1}")
+ "lock or{<modesuffix>}\t{%1, %0|%0, %1}")
(define_insn "sync_and<mode>"
[(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -297,7 +297,7 @@
UNSPECV_LOCK))
(clobber (reg:CC FLAGS_REG))]
""
- "lock{\;| }and{<modesuffix>\t%1, %0| %0, %1}")
+ "lock and{<modesuffix>}\t{%1, %0|%0, %1}")
(define_insn "sync_xor<mode>"
[(set (match_operand:IMODE 0 "memory_operand" "+m")
@@ -307,4 +307,4 @@
UNSPECV_LOCK))
(clobber (reg:CC FLAGS_REG))]
""
- "lock{\;| }xor{<modesuffix>\t%1, %0| %0, %1}")
+ "lock xor{<modesuffix>}\t{%1, %0|%0, %1}")