From 582d11e6ac018058b08b5668b092bbe18549c4fe Mon Sep 17 00:00:00 2001
From: Jim Wilson <wilson@redhat.com>
Date: Tue, 18 Feb 2003 20:12:11 +0000
Subject: [PATCH] Patch for PR 9617.
* config/ia64/ia64.md (floatdidf2, floatdisf2): Add %, before second
instruction in output template.
(bsp_value): Change output template from string to C code, add %,
before actual instruction.
(flushrs): Mark as not predicable.
From-SVN: r63062
---
gcc/ChangeLog | 8 ++++++++
gcc/config/ia64/ia64.md | 12 ++++++++----
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c69a4d4bda52..b23bec780029 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2003-02-18 Jim Wilson <wilson@redhat.com>
+
+ * config/ia64/ia64.md (floatdidf2, floatdisf2): Add %, before second
+ instruction in output template.
+ (bsp_value): Change output template from string to C code, add %,
+ before actual instruction.
+ (flushrs): Mark as not predicable.
+
2003-02-18 Krister Walfridsson <cato@df.lth.se>
* inclhack.def (netbsd_bogus_semicolon): New fix.
diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index f759eb39efa1..77f7f34830fc 100644
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -985,7 +985,7 @@
[(set (match_operand:DF 0 "register_operand" "=f")
(float:DF (match_operand:DI 1 "register_operand" "f")))]
"!INTEL_EXTENDED_IEEE_FORMAT"
- "fcvt.xf %0 = %1\;;;\;fnorm.d %0 = %0"
+ "fcvt.xf %0 = %1\;;;\;%,fnorm.d %0 = %0"
[(set_attr "itanium_class" "fcvtfx")])
;; ??? Suboptimal. This should be split somehow.
@@ -993,7 +993,7 @@
[(set (match_operand:SF 0 "register_operand" "=f")
(float:SF (match_operand:DI 1 "register_operand" "f")))]
"!INTEL_EXTENDED_IEEE_FORMAT"
- "fcvt.xf %0 = %1\;;;\;fnorm.s %0 = %0"
+ "fcvt.xf %0 = %1\;;;\;%,fnorm.s %0 = %0"
[(set_attr "itanium_class" "fcvtfx")])
(define_insn "fix_truncsfdi2"
@@ -5029,7 +5029,10 @@
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(const_int 0)] UNSPEC_BSP_VALUE))]
""
- ";;\;mov %0 = ar.bsp"
+ "*
+{
+ return \";;\;%,mov %0 = ar.bsp\";
+}"
[(set_attr "itanium_class" "frar_i")])
(define_insn "set_bsp"
@@ -5062,7 +5065,8 @@
[(unspec [(const_int 0)] UNSPEC_FLUSHRS)]
""
";;\;flushrs\;;;"
- [(set_attr "itanium_class" "rse_m")])
+ [(set_attr "itanium_class" "rse_m")
+ (set_attr "predicable" "no")])
;; ::::::::::::::::::::
;; ::
--
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