From 60ea4be6cf38b6333158ac1a4b8e39c685af8328 Mon Sep 17 00:00:00 2001
From: Ian Bolton <ian.bolton@arm.com>
Date: Fri, 6 Dec 2013 15:51:49 +0000
Subject: [PATCH] [ARM] Add __builtin_trap support for A32
Co-Authored-By: Mark Mitchell <mark@codesourcery.com>
From-SVN: r205749
---
gcc/ChangeLog | 7 +++++++
gcc/config/arm/arm.md | 17 +++++++++++++++++
gcc/config/arm/types.md | 2 ++
gcc/testsuite/ChangeLog | 7 +++++++
gcc/testsuite/gcc.target/arm/builtin-trap.c | 10 ++++++++++
.../gcc.target/arm/thumb-builtin-trap.c | 11 +++++++++++
6 files changed, 54 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/arm/builtin-trap.c
create mode 100644 gcc/testsuite/gcc.target/arm/thumb-builtin-trap.c
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index abf4283dc645..deb7eccbcc12 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2013-12-06 Ian Bolton <ian.bolton@arm.com>
+ Mark Mitchell <mark@codesourcery.com>
+
+ PR target/59091
+ * config/arm/arm.md (trap): New pattern.
+ * config/arm/types.md: Added a type for trap.
+
2013-12-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
* expr.c (expand_assignment): Update bitregion_start and
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 841c624d4859..389527cf21d8 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -9927,6 +9927,23 @@
(set_attr "type" "mov_reg")]
)
+(define_insn "trap"
+ [(trap_if (const_int 1) (const_int 0))]
+ ""
+ "*
+ if (TARGET_ARM)
+ return \".inst\\t0xe7f000f0\";
+ else
+ return \".inst\\t0xdeff\";
+ "
+ [(set (attr "length")
+ (if_then_else (eq_attr "is_thumb" "yes")
+ (const_int 2)
+ (const_int 4)))
+ (set_attr "type" "trap")
+ (set_attr "conds" "unconditional")]
+)
+
;; Patterns to allow combination of arithmetic, cond code and shifts
diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md
index 1c4b9e33c7e5..6351f080b32c 100644
--- a/gcc/config/arm/types.md
+++ b/gcc/config/arm/types.md
@@ -152,6 +152,7 @@
; store2 store 2 words to memory from arm registers.
; store3 store 3 words to memory from arm registers.
; store4 store 4 (or more) words to memory from arm registers.
+; trap cause a trap in the kernel.
; udiv unsigned division.
; umaal unsigned multiply accumulate accumulate long.
; umlal unsigned multiply accumulate long.
@@ -645,6 +646,7 @@
store2,\
store3,\
store4,\
+ trap,\
udiv,\
umaal,\
umlal,\
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c47187d351dd..bdc37205c73f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2013-12-06 Ian Bolton <ian.bolton@arm.com>
+ Mark Mitchell <mark@codesourcery.com>
+
+ PR target/59091
+ * gcc.target/arm/builtin-trap.c: New test.
+ * gcc.target/arm/thumb-builtin-trap.c: Likewise.
+
2013-12-06 Eric Botcazou <ebotcazou@adacore.com>
* gcc.target/sparc/pdistn.c: New test.
diff --git a/gcc/testsuite/gcc.target/arm/builtin-trap.c b/gcc/testsuite/gcc.target/arm/builtin-trap.c
new file mode 100644
index 000000000000..4ff8d253e751
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/builtin-trap.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm32 } */
+
+void
+trap ()
+{
+ __builtin_trap ();
+}
+
+/* { dg-final { scan-assembler "0xe7f000f0" { target { arm_nothumb } } } } */
diff --git a/gcc/testsuite/gcc.target/arm/thumb-builtin-trap.c b/gcc/testsuite/gcc.target/arm/thumb-builtin-trap.c
new file mode 100644
index 000000000000..22e90e7d2cfa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/thumb-builtin-trap.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mthumb" } */
+/* { dg-require-effective-target arm_thumb1_ok } */
+
+void
+trap ()
+{
+ __builtin_trap ();
+}
+
+/* { dg-final { scan-assembler "0xdeff" } } */
--
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