From 62b9c42c443c31cd6b3480e8a7216777f9291447 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu@cs.umass.edu>
Date: Sun, 13 Apr 2003 11:18:36 +0000
Subject: [PATCH] invoke.texi: Fix typos.
* doc/invoke.texi: Fix typos.
* doc/tm.texi: Likewise.
From-SVN: r65544
---
gcc/ChangeLog | 5 +++++
gcc/doc/invoke.texi | 10 +++++-----
gcc/doc/tm.texi | 2 +-
3 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9a93abb830ea..337f0cffbbd9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-04-13 Kazu Hirata <kazu@cs.umass.edu>
+
+ * doc/invoke.texi: Fix typos.
+ * doc/tm.texi: Likewise.
+
2003-04-12 Zack Weinberg <zack@codesourcery.com>
* c-typeck.c (digest_init, push_init_level): Use CONSTRUCTOR_ELTS.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 384d6314acc2..b69ea7e7fc22 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -2485,7 +2485,7 @@ Subscripting an array which has been declared @samp{register}.
Taking the address of a variable which has been declared @samp{register}.
@item @r{(C++ only)}
-A base class is not initialized in a derived class' copy constrcutor.
+A base class is not initialized in a derived class' copy constructor.
@end itemize
@item -Wno-div-by-zero
@@ -3915,9 +3915,9 @@ sense when scheduling before register allocation, i.e.@: with
@item -fsched2-use-superblocks
@opindex fsched2-use-superblocks
When schedulilng after register allocation, do use superblock scheduling
-algorithm. Superblock scheduling allows motion acress basic block boundaries
+algorithm. Superblock scheduling allows motion across basic block boundaries
resulting on faster schedules. This option is experimental, as not all machine
-descriptions used by GCC model the CPU closely enought to avoid unreliable
+descriptions used by GCC model the CPU closely enough to avoid unreliable
results from the algorithm.
This only makes sense when scheduling after register allocation, i.e.@: with
@@ -3930,7 +3930,7 @@ allocation and additionally perform code duplication in order to increase the
size of superblocks using tracer pass. See @option{-ftracer} for details on
trace formation.
-This mode should produce faster but singificantly longer programs. Also
+This mode should produce faster but significantly longer programs. Also
without @code{-fbranch-probabilities} the traces constructed may not match the
reality and hurt the performance. This only makes
sense when scheduling after register allocation, i.e.@: with
@@ -6386,7 +6386,7 @@ problems with invalid Maverick instruction combinations. This option
is only valid if the @option{-mcpu=ep9312} option has been used to
enable generation of instructions for the Cirrus Maverick floating
point co-processor. This option is not enabled by default, since the
-problem is only present in older Maverick implemenations. The default
+problem is only present in older Maverick implementations. The default
can be re-enabled by use of the @option{-mno-cirrus-fix-invalid-insns}
switch.
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 9ff8040a7396..f9da5e289e12 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -5738,7 +5738,7 @@ considered for the multipass insn scheduling. If the hook returns
zero for insn passed as the parameter, the insn will be not chosen to
be issued.
-The default is that any ready insns can be choosen to be issued.
+The default is that any ready insns can be chosen to be issued.
@end deftypefn
@deftypefn {Target Hook} int TARGET_SCHED_DFA_NEW_CYCLE (FILE *, int, rtx, int, int, int *)
--
GitLab