diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fc3654583d12cfe182a4972c3c8342320ac0d01d..3674805174866ce7fd1d5e830c029431149bedbc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,8 +1,14 @@
+2010-08-20 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (ashift RSP splitter): Remove splitter.
+ (pro_epilogue_adjust_stack_di_2): Use "l" constraint for
+ alternative 1 of operand 2.
+
2010-08-20 Jakub Jelinek <jakub@redhat.com>
Paolo Bonzini <bonzini@gnu.org>
* simplify-rtx.c (simplify_unary_operation_1): Optimize
- (sign_extend (zero_extend ()) and
+ (sign_extend (zero_extend (...)) and
({sign,zero}_extend (lshiftrt (ashift X (const_int I)) (const_int I))).
2010-08-20 Jakub Jelinek <jakub@redhat.com>
@@ -13,14 +19,13 @@
2010-08-20 Iain Sandoe <iains@gcc.gnu.org>
- * config/rs6000/darwin.h (LIB_SPEC): New. Provide save/restFP by
+ * config/rs6000/darwin.h (LIB_SPEC): New. Provide saveFP/restFP by
linking libgcc.a.
-
+
2010-08-20 Jakub Jelinek <jakub@redhat.com>
Michael Matz <matz@suse.de>
- * tree-ssa-address.c (tree_mem_ref_addr): Convert offset to
- sizetype.
+ * tree-ssa-address.c (tree_mem_ref_addr): Convert offset to sizetype.
2010-08-20 Nathan Froyd <froydnj@codesourcery.com>
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index e5de3b9ce00f42ff9ee2a04f2c2bc55510e36f15..4d4e4c9c99265b057f14b9e0c2138d28c1e1a4c6 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5935,10 +5935,6 @@
(const_string "*")))
(set_attr "mode" "HI")])
-;; %%% After Dave's SUBREG_BYTE stuff goes in, re-enable incb %ah
-;; type optimizations enabled by define-splits. This is not important
-;; for PII, and in fact harmful because of partial register stalls.
-
(define_insn "*addhi_1_lea"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,rm,r,r")
(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r,r")
@@ -9637,26 +9633,6 @@
operands[2] = gen_int_mode (1 << INTVAL (operands[2]), DImode);
})
-;; Rare case of shifting RSP is handled by generating move and shift
-(define_split
- [(set (match_operand 0 "register_operand" "")
- (ashift (match_operand 1 "register_operand" "")
- (match_operand:QI 2 "const_int_operand" "")))
- (clobber (reg:CC FLAGS_REG))]
- "reload_completed
- && true_regnum (operands[0]) != true_regnum (operands[1])"
- [(const_int 0)]
-{
- rtx pat, clob;
- emit_move_insn (operands[0], operands[1]);
- pat = gen_rtx_SET (VOIDmode, operands[0],
- gen_rtx_ASHIFT (GET_MODE (operands[0]),
- operands[0], operands[2]));
- clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
- emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, pat, clob)));
- DONE;
-})
-
;; This pattern can't accept a variable shift count, since shifts by
;; zero don't affect the flags. We assume that shifts by constant
;; zero are optimized away.
@@ -16411,7 +16387,7 @@
[(set (match_operand:DI 0 "register_operand" "=r,r")
(plus:DI (match_operand:DI 1 "register_operand" "0,r")
(match_operand:DI 3 "immediate_operand" "i,i")))
- (use (match_operand:DI 2 "register_operand" "r,r"))
+ (use (match_operand:DI 2 "register_operand" "r,l"))
(clobber (reg:CC FLAGS_REG))
(clobber (mem:BLK (scratch)))]
"TARGET_64BIT"