From 7328faf89e9b4953baaff10e18262c70fbd3e578 Mon Sep 17 00:00:00 2001
From: Richard Sandiford <richard.sandiford@arm.com>
Date: Fri, 5 Jan 2024 16:25:16 +0000
Subject: [PATCH] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104]
When SVE is enabled, we try vectorising with multiple different SVE and
Advanced SIMD approaches and use the cost model to pick the best one.
Until now, we've not done that for Advanced SIMD, since "the first mode
that works should always be the best".
The testcase is a counterexample. Each iteration of the scalar loop
vectorises naturally with 64-bit input vectors and 128-bit output
vectors. We do try that for SVE, and choose it as the best approach.
But the first approach we try is instead to use:
- a vectorisation factor of 2
- 1 128-bit vector for the inputs
- 2 128-bit vectors for the outputs
But since the stride is variable, the cost of marshalling the input
vector from two iterations outweighs the benefit of doing two iterations
at once.
This patch therefore generalises aarch64-sve-compare-costs to
aarch64-vect-compare-costs and applies it to non-SVE compilations.
gcc/
PR target/113104
* doc/invoke.texi (aarch64-sve-compare-costs): Replace with...
(aarch64-vect-compare-costs): ...this.
* config/aarch64/aarch64.opt (-param=aarch64-sve-compare-costs=):
Replace with...
(-param=aarch64-vect-compare-costs=): ...this new param.
* config/aarch64/aarch64.cc (aarch64_override_options_internal):
Don't disable it when vectorizing for Advanced SIMD only.
(aarch64_autovectorize_vector_modes): Apply VECT_COMPARE_COSTS
whenever aarch64_vect_compare_costs is true.
gcc/testsuite/
PR target/113104
* gcc.target/aarch64/pr113104.c: New test.
* gcc.target/aarch64/sve/cond_arith_1.c: Update for new parameter
names.
* gcc.target/aarch64/sve/cond_arith_1_run.c: Likewise.
* gcc.target/aarch64/sve/cond_arith_3.c: Likewise.
* gcc.target/aarch64/sve/cond_arith_3_run.c: Likewise.
* gcc.target/aarch64/sve/gather_load_6.c: Likewise.
* gcc.target/aarch64/sve/gather_load_7.c: Likewise.
* gcc.target/aarch64/sve/load_const_offset_2.c: Likewise.
* gcc.target/aarch64/sve/load_const_offset_3.c: Likewise.
* gcc.target/aarch64/sve/mask_gather_load_6.c: Likewise.
* gcc.target/aarch64/sve/mask_gather_load_7.c: Likewise.
* gcc.target/aarch64/sve/mask_load_slp_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_2.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_3.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_load_4.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_1.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_1_run.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_2.c: Likewise.
* gcc.target/aarch64/sve/mask_struct_store_2_run.c: Likewise.
* gcc.target/aarch64/sve/pack_1.c: Likewise.
* gcc.target/aarch64/sve/reduc_4.c: Likewise.
* gcc.target/aarch64/sve/scatter_store_6.c: Likewise.
* gcc.target/aarch64/sve/scatter_store_7.c: Likewise.
* gcc.target/aarch64/sve/strided_load_3.c: Likewise.
* gcc.target/aarch64/sve/strided_store_3.c: Likewise.
* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_signed_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_unsigned_1.c: Likewise.
* gcc.target/aarch64/sve/unpack_unsigned_1_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_11.c: Likewise.
* gcc.target/aarch64/sve/vcond_11_run.c: Likewise.
---
gcc/config/aarch64/aarch64.cc | 13 +---------
gcc/config/aarch64/aarch64.opt | 7 +++---
gcc/doc/invoke.texi | 25 +++++++++++++------
gcc/testsuite/gcc.target/aarch64/pr113104.c | 25 +++++++++++++++++++
.../gcc.target/aarch64/sve/cond_arith_1.c | 2 +-
.../gcc.target/aarch64/sve/cond_arith_1_run.c | 2 +-
.../gcc.target/aarch64/sve/cond_arith_3.c | 2 +-
.../gcc.target/aarch64/sve/cond_arith_3_run.c | 2 +-
.../gcc.target/aarch64/sve/gather_load_6.c | 2 +-
.../gcc.target/aarch64/sve/gather_load_7.c | 2 +-
.../aarch64/sve/load_const_offset_2.c | 2 +-
.../aarch64/sve/load_const_offset_3.c | 2 +-
.../aarch64/sve/mask_gather_load_6.c | 2 +-
.../aarch64/sve/mask_gather_load_7.c | 2 +-
.../gcc.target/aarch64/sve/mask_load_slp_1.c | 2 +-
.../aarch64/sve/mask_struct_load_1.c | 2 +-
.../aarch64/sve/mask_struct_load_2.c | 2 +-
.../aarch64/sve/mask_struct_load_3.c | 2 +-
.../aarch64/sve/mask_struct_load_4.c | 2 +-
.../aarch64/sve/mask_struct_store_1.c | 2 +-
.../aarch64/sve/mask_struct_store_1_run.c | 2 +-
.../aarch64/sve/mask_struct_store_2.c | 2 +-
.../aarch64/sve/mask_struct_store_2_run.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/pack_1.c | 2 +-
.../gcc.target/aarch64/sve/reduc_4.c | 2 +-
.../gcc.target/aarch64/sve/scatter_store_6.c | 2 +-
.../gcc.target/aarch64/sve/scatter_store_7.c | 2 +-
.../gcc.target/aarch64/sve/strided_load_3.c | 2 +-
.../gcc.target/aarch64/sve/strided_store_3.c | 2 +-
.../aarch64/sve/unpack_fcvt_signed_1.c | 2 +-
.../aarch64/sve/unpack_fcvt_unsigned_1.c | 2 +-
.../gcc.target/aarch64/sve/unpack_signed_1.c | 2 +-
.../aarch64/sve/unpack_unsigned_1.c | 2 +-
.../aarch64/sve/unpack_unsigned_1_run.c | 2 +-
.../gcc.target/aarch64/sve/vcond_11.c | 2 +-
.../gcc.target/aarch64/sve/vcond_11_run.c | 2 +-
36 files changed, 79 insertions(+), 55 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr113104.c
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index d0f31cb6b8bd..a5a6b52730d6 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -18223,12 +18223,6 @@ aarch64_override_options_internal (struct gcc_options *opts)
SET_OPTION_IF_UNSET (opts, &global_options_set,
param_sched_autopref_queue_depth, queue_depth);
- /* If using Advanced SIMD only for autovectorization disable SVE vector costs
- comparison. */
- if (aarch64_autovec_preference == 1)
- SET_OPTION_IF_UNSET (opts, &global_options_set,
- aarch64_sve_compare_costs, 0);
-
/* Set up parameters to be used in prefetching algorithm. Do not
override the defaults unless we are tuning for a core we have
researched values for. */
@@ -22138,12 +22132,7 @@ aarch64_autovectorize_vector_modes (vector_modes *modes, bool)
modes->safe_push (sve_modes[sve_i++]);
unsigned int flags = 0;
- /* Consider enabling VECT_COMPARE_COSTS for SVE, both so that we
- can compare SVE against Advanced SIMD and so that we can compare
- multiple SVE vectorization approaches against each other. There's
- not really any point doing this for Advanced SIMD only, since the
- first mode that works should always be the best. */
- if (TARGET_SVE && aarch64_sve_compare_costs)
+ if (aarch64_vect_compare_costs)
flags |= VECT_COMPARE_COSTS;
return flags;
}
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt
index 2abdc848ebc5..ceed5cdb201f 100644
--- a/gcc/config/aarch64/aarch64.opt
+++ b/gcc/config/aarch64/aarch64.opt
@@ -332,9 +332,10 @@ moutline-atomics
Target Var(aarch64_flag_outline_atomics) Init(2) Save
Generate local calls to out-of-line atomic operations.
--param=aarch64-sve-compare-costs=
-Target Joined UInteger Var(aarch64_sve_compare_costs) Init(1) IntegerRange(0, 1) Param
-When vectorizing for SVE, consider using unpacked vectors for smaller elements and use the cost model to pick the cheapest approach. Also use the cost model to choose between SVE and Advanced SIMD vectorization.
+-param=aarch64-vect-compare-costs=
+Target Joined UInteger Var(aarch64_vect_compare_costs) Init(1) IntegerRange(0, 1) Param
+When vectorizing, consider using multiple different approaches and use
+the cost model to choose the cheapest one.
-param=aarch64-float-recp-precision=
Target Joined UInteger Var(aarch64_float_recp_precision) Init(1) IntegerRange(1, 5) Param
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d71583853f0d..68d1f364ac05 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -16778,14 +16778,23 @@ With @option{--param=openacc-privatization=noisy}, do diagnose.
The following choices of @var{name} are available on AArch64 targets:
@table @gcctabopt
-@item aarch64-sve-compare-costs
-When vectorizing for SVE, consider using ``unpacked'' vectors for
-smaller elements and use the cost model to pick the cheapest approach.
-Also use the cost model to choose between SVE and Advanced SIMD vectorization.
-
-Using unpacked vectors includes storing smaller elements in larger
-containers and accessing elements with extending loads and truncating
-stores.
+@item aarch64-vect-compare-costs
+When vectorizing, consider using multiple different approaches and use
+the cost model to choose the cheapest one. This includes:
+
+@itemize
+@item
+Trying both SVE and Advanced SIMD, when SVE is available.
+
+@item
+Trying to use 64-bit Advanced SIMD vectors for the smallest data elements,
+rather than using 128-bit vectors for everything.
+
+@item
+Trying to use ``unpacked'' SVE vectors for smaller elements. This includes
+storing smaller elements in larger containers and accessing elements with
+extending loads and truncating stores.
+@end itemize
@item aarch64-float-recp-precision
The number of Newton iterations for calculating the reciprocal for float type.
diff --git a/gcc/testsuite/gcc.target/aarch64/pr113104.c b/gcc/testsuite/gcc.target/aarch64/pr113104.c
new file mode 100644
index 000000000000..ff666184fa37
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr113104.c
@@ -0,0 +1,25 @@
+/* { dg-options "-O3" } */
+
+#pragma GCC target "+nosve"
+
+int test(unsigned array[4][4]);
+
+int foo(unsigned short *a, unsigned long n)
+{
+ unsigned array[4][4];
+
+ for (unsigned i = 0; i < 4; i++, a += n)
+ {
+ array[i][0] = a[0] << 6;
+ array[i][1] = a[1] << 6;
+ array[i][2] = a[2] << 6;
+ array[i][3] = a[3] << 6;
+ }
+
+ return test(array);
+}
+
+/* { dg-final { scan-assembler-times {\tushll\t} 4 } } */
+/* { dg-final { scan-assembler-not {\tzip.\t} } } */
+/* { dg-final { scan-assembler-not {\tins\t} } } */
+/* { dg-final { scan-assembler-not {\tshl\t} } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1.c b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1.c
index d831e9c11425..2989f0cf848f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1_run.c b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1_run.c
index 5808e0a96639..4689e28b3d37 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1_run.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_1_run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include "cond_arith_1.c"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3.c b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3.c
index 068e0b647931..ec0723a1e5df 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3_run.c b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3_run.c
index d2580046dab5..f4dbcd057989 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3_run.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/cond_arith_3_run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include "cond_arith_3.c"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/gather_load_6.c b/gcc/testsuite/gcc.target/aarch64/sve/gather_load_6.c
index 6fdd16b4adbb..b99b90b1baa8 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/gather_load_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/gather_load_6.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/gather_load_7.c b/gcc/testsuite/gcc.target/aarch64/sve/gather_load_7.c
index 5a3f3e77b64c..27eee8f6a2de 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/gather_load_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/gather_load_7.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-vect-compare-costs=0" } */
#define INDEX16 uint16_t
#define INDEX32 uint32_t
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_2.c b/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_2.c
index 0aab81b85606..7aec5968a111 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_2.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_3.c b/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_3.c
index 5b306f793335..749320882c0f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/load_const_offset_3.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -save-temps -msve-vector-bits=256 --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -save-temps -msve-vector-bits=256 --param aarch64-vect-compare-costs=0" } */
#include "load_const_offset_2.c"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_6.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_6.c
index a735e6107568..7f56a33cc6c4 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_6.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_7.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_7.c
index 687716e7176a..c31fae308a53 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_gather_load_7.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_load_slp_1.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_load_slp_1.c
index a38b92dc53e7..8a243badfc8e 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_load_slp_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_load_slp_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c
index 450fbb887e39..44d443c3549f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_2.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_2.c
index 499abd7c99a1..8d15989a9fb2 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_3.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_3.c
index a5ce0716322d..31f3da5cf7c3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_3.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_4.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_4.c
index bdfea964f88a..b1d8063a6f68 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_load_4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1.c
index 39fae68a5d02..77df7b0d0f4d 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1_run.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1_run.c
index 2764d75c8e0a..47b4cfb86697 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1_run.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_1_run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include "mask_struct_store_1.c"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2.c
index 0fe9b9934029..7ae3916b2b89 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2_run.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2_run.c
index 54cfaec36a95..7469950469c9 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2_run.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_struct_store_2_run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
#include "mask_struct_store_2.c"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pack_1.c b/gcc/testsuite/gcc.target/aarch64/sve/pack_1.c
index 7c7bfdd030c0..428e699f303f 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/pack_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pack_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/reduc_4.c b/gcc/testsuite/gcc.target/aarch64/sve/reduc_4.c
index b0260c9754c5..80159085a380 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/reduc_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/reduc_4.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -ffast-math --param aarch64-vect-compare-costs=0" } */
double
f (double *restrict a, double *restrict b, int *lookup)
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_6.c b/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_6.c
index a9c37c4414b2..9e7fb7d653d7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_6.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_6.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -fwrapv --save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_7.c b/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_7.c
index 147eadc63a42..d3a88ffef4d6 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_7.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/scatter_store_7.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-vect-compare-costs=0" } */
#define INDEX16 uint16_t
#define INDEX32 uint32_t
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/strided_load_3.c b/gcc/testsuite/gcc.target/aarch64/sve/strided_load_3.c
index 2e7cd98e9060..d8e360472e8b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/strided_load_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/strided_load_3.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/strided_store_3.c b/gcc/testsuite/gcc.target/aarch64/sve/strided_store_3.c
index 335f99bb5a9b..dc79feca2bcc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/strided_store_3.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/strided_store_3.c
@@ -1,5 +1,5 @@
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --save-temps --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
index 4c5e88657408..ccade4dcce18 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_signed_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
index 3ff2bd127756..8911461b4104 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_signed_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_signed_1.c
index ecb6e99400ca..d9e4414091be 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_signed_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_signed_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1.c
index c4a022b84d35..ef163464ccc5 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1_run.c b/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1_run.c
index 6ee7e92a5167..c541ea778df7 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1_run.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/unpack_unsigned_1_run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-inline --param aarch64-vect-compare-costs=0" } */
#include "unpack_unsigned_1.c"
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vcond_11.c b/gcc/testsuite/gcc.target/aarch64/sve/vcond_11.c
index 4efcf3ab32ae..66c7664f70ec 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/vcond_11.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/vcond_11.c
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -march=armv8-a+sve --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -march=armv8-a+sve --param aarch64-vect-compare-costs=0" } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vcond_11_run.c b/gcc/testsuite/gcc.target/aarch64/sve/vcond_11_run.c
index 4cbe4a6f8670..60bb1545ff5b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/vcond_11_run.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/vcond_11_run.c
@@ -1,5 +1,5 @@
/* { dg-do run { target aarch64_sve_hw } } */
-/* { dg-options "-O2 -ftree-vectorize -march=armv8-a+sve --param aarch64-sve-compare-costs=0" } */
+/* { dg-options "-O2 -ftree-vectorize -march=armv8-a+sve --param aarch64-vect-compare-costs=0" } */
#include "vcond_11.c"
--
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