From 749af8ee126fea9757ecf38ea85093603114bd50 Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@redhat.com>
Date: Fri, 1 Feb 2013 08:34:15 -0800
Subject: [PATCH] ppc64: widening multiply patterns

        * config/rs6000/rs6000.md (smulditi3): New.
        (umulditi3): New.

From-SVN: r195667
---
 gcc/ChangeLog               |  5 +++++
 gcc/config/rs6000/rs6000.md | 28 ++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8c37f919bb2e..dd9224dd9866 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-02-01  Richard Henderson <rth@redhat.com>
+
+	* config/rs6000/rs6000.md (smulditi3): New.
+	(umulditi3): New.
+
 2013-02-01  David Edelsohn  <dje.gcc@gmail.com>
 
 	* config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_COMMON): Use floor_log2.
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index a4af648a3195..b3db6817647e 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6326,6 +6326,34 @@
   "mulhdu %0,%1,%2"
   [(set_attr "type" "lmul")])
 
+(define_expand "mulditi3"
+  [(set (match_operand:TI 0 "gpc_reg_operand")
+	(mult:TI (sign_extend:TI (match_operand:DI 1 "gpc_reg_operand"))
+		 (sign_extend:TI (match_operand:DI 2 "gpc_reg_operand"))))]
+  "TARGET_POWERPC64"
+{
+  rtx l = gen_reg_rtx (DImode), h = gen_reg_rtx (DImode);
+  emit_insn (gen_muldi3 (l, operands[1], operands[2]));
+  emit_insn (gen_smuldi3_highpart (h, operands[1], operands[2]));
+  emit_move_insn (gen_lowpart (DImode, operands[0]), l);
+  emit_move_insn (gen_highpart (DImode, operands[0]), h);
+  DONE;
+})
+
+(define_expand "umulditi3"
+  [(set (match_operand:TI 0 "gpc_reg_operand")
+	(mult:TI (zero_extend:TI (match_operand:DI 1 "gpc_reg_operand"))
+		 (zero_extend:TI (match_operand:DI 2 "gpc_reg_operand"))))]
+  "TARGET_POWERPC64"
+{
+  rtx l = gen_reg_rtx (DImode), h = gen_reg_rtx (DImode);
+  emit_insn (gen_muldi3 (l, operands[1], operands[2]));
+  emit_insn (gen_umuldi3_highpart (h, operands[1], operands[2]));
+  emit_move_insn (gen_lowpart (DImode, operands[0]), l);
+  emit_move_insn (gen_highpart (DImode, operands[0]), h);
+  DONE;
+})
+
 (define_insn "rotldi3"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
 	(rotate:DI (match_operand:DI 1 "gpc_reg_operand" "r,r")
-- 
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