From 795175513e9978d3141e8729da8dbff875e2d46c Mon Sep 17 00:00:00 2001
From: Sofiane Naci <sofiane.naci@arm.com>
Date: Tue, 26 Mar 2013 14:41:11 +0000
Subject: [PATCH] aarch64.c (aarch64_classify_address): Support PC-relative
load in SI modes and above only.
* config/aarch64/aarch64.c (aarch64_classify_address): Support
PC-relative load in SI modes and above only.
From-SVN: r197107
---
gcc/ChangeLog | 5 +++++
gcc/config/aarch64/aarch64.c | 5 +++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 34721f752a1c..51a427614d98 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2013-03-26 Sofiane Naci <sofiane.naci@arm.com>
+
+ * config/aarch64/aarch64.c (aarch64_classify_address): Support
+ PC-relative load in SI modes and above only.
+
2013-03-26 Xinyu Qi <xyqi@marvell.com>
* config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment.
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 343586e28c8e..d51b8d04bb04 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -2926,9 +2926,10 @@ aarch64_classify_address (struct aarch64_address_info *info,
case CONST:
case SYMBOL_REF:
case LABEL_REF:
- /* load literal: pc-relative constant pool entry. */
+ /* load literal: pc-relative constant pool entry. Only supported
+ for SI mode or larger. */
info->type = ADDRESS_SYMBOLIC;
- if (outer_code != PARALLEL)
+ if (outer_code != PARALLEL && GET_MODE_SIZE (mode) >= 4)
{
rtx sym, addend;
--
GitLab