diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d5e3ce94a1f32eb326fcaf12b647f6ab620d1047..1808c43aa0ed1bdb36ab0d0ab95f8efbe9de63a2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2009-10-21  Vladimir Makarov  <vmakarov@redhat.com>
+
+	* doc/invoke.texi (fira-loop-pressure): Update default value.
+	* opts.c (decode_options): Remove default value setting for
+	flag_ira_loop_pressure.
+	* config/ia64/ia64.c (ia64_override_options): Set
+	flag_ira_loop_pressure up for -O3.
+	* config/rs6000/rs6000.c (rs6000_override_options): Ditto.
+	
 2009-10-21  Sebastian Pop  <sebastian.pop@amd.com>
 
 	PR tree-optimization/41497
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 75c8f0ee6c4638e355a5b603d0a0e654e1047cf9..23fc7540ec0251ca558a5d2edb7f06ad8a52969a 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -5496,6 +5496,14 @@ ia64_override_options (void)
   if (TARGET_AUTO_PIC)
     target_flags |= MASK_CONST_GP;
 
+  /* Numerous experiment shows that IRA based loop pressure
+     calculation works better for RTL loop invariant motion on targets
+     with enough (>= 32) registers.  It is an expensive optimization.
+     So it is on only for peak performance.  */
+  if (optimize >= 3)
+    flag_ira_loop_pressure = 1;
+
+
   ia64_flag_schedule_insns2 = flag_schedule_insns_after_reload;
   flag_schedule_insns_after_reload = 0;
 
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 8bb92129ecfb96f1b97c5d011c9f8394af556515..9b03a9bfe68b0d0bd400b474456bc7fe3604249e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -2281,6 +2281,13 @@ rs6000_override_options (const char *default_cpu)
 		     | MASK_POPCNTD | MASK_VSX | MASK_ISEL | MASK_NO_UPDATE)
   };
 
+  /* Numerous experiment shows that IRA based loop pressure
+     calculation works better for RTL loop invariant motion on targets
+     with enough (>= 32) registers.  It is an expensive optimization.
+     So it is on only for peak performance.  */
+  if (optimize >= 3)
+    flag_ira_loop_pressure = 1;
+
   /* Set the pointer size.  */
   if (TARGET_64BIT)
     {
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 0a7d9790476367660bd78103b42e95981e415096..7b20ced5483795f7e80d8ae9c9dcdb294724a6c5 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -5733,8 +5733,7 @@ invoking @option{-O2} on programs that use computed gotos.
 Optimize yet more.  @option{-O3} turns on all optimizations specified
 by @option{-O2} and also turns on the @option{-finline-functions},
 @option{-funswitch-loops}, @option{-fpredictive-commoning},
-@option{-fgcse-after-reload}, @option{-ftree-vectorize} and
-@option{-fira-loop-pressure} options.
+@option{-fgcse-after-reload} and @option{-ftree-vectorize} options.
 
 @item -O0
 @opindex O0
@@ -6235,9 +6234,10 @@ architectures with big regular register files.
 @opindex fira-loop-pressure
 Use IRA to evaluate register pressure in loops for decision to move
 loop invariants.  Usage of this option usually results in generation
-of faster and smaller code but can slow compiler down.
+of faster and smaller code on machines with big register files (>= 32
+registers) but it can slow compiler down.
 
-This option is enabled at level @option{-O3}.
+This option is enabled at level @option{-O3} for some targets.
 
 @item -fno-ira-share-save-slots
 @opindex fno-ira-share-save-slots
diff --git a/gcc/opts.c b/gcc/opts.c
index c69a399768fa0dcd0021781b5e358a38d0d1ca00..51a0cb954196be8224d6dbe6f3d86beb0740adf6 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -917,7 +917,6 @@ decode_options (unsigned int argc, const char **argv)
   flag_ipa_cp_clone = opt3;
   if (flag_ipa_cp_clone)
     flag_ipa_cp = 1;
-  flag_ira_loop_pressure = opt3;
 
   /* Just -O1/-O0 optimizations.  */
   opt1_max = (optimize <= 1);