From 7eac19be5f7dd92fcbcfe13f6edbb4f9bd45c15c Mon Sep 17 00:00:00 2001
From: Monk Chiang <monk.chiang@sifive.com>
Date: Tue, 13 Feb 2024 09:02:12 -0700
Subject: [PATCH] Re: [PATCH] RISC-V: Fix macro fusion for auipc+add, when
identifying UNSPEC_AUIPC. [PR113742]
gcc/ChangeLog:
PR target/113742
* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr113742.c: New test.
---
gcc/config/riscv/riscv.cc | 2 +-
gcc/testsuite/gcc.target/riscv/pr113742.c | 4 ++++
2 files changed, 5 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/pr113742.c
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 799d7919a4a2..4100abc9dd17 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8434,7 +8434,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr)
(lo_sum:DI (reg:DI rD) (const_int IMM12))) */
if (GET_CODE (SET_SRC (prev_set)) == UNSPEC
- && XINT (prev_set, 1) == UNSPEC_AUIPC
+ && XINT (SET_SRC (prev_set), 1) == UNSPEC_AUIPC
&& (GET_CODE (SET_SRC (curr_set)) == LO_SUM
|| (GET_CODE (SET_SRC (curr_set)) == PLUS
&& SMALL_OPERAND (INTVAL (XEXP (SET_SRC (curr_set), 1))))))
diff --git a/gcc/testsuite/gcc.target/riscv/pr113742.c b/gcc/testsuite/gcc.target/riscv/pr113742.c
new file mode 100644
index 000000000000..ab8934c2a8a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr113742.c
@@ -0,0 +1,4 @@
+//* { dg-do compile } */
+/* { dg-options "-O2 -finstrument-functions -mabi=lp64d -mcpu=sifive-p670" } */
+
+void foo(void) {}
--
GitLab