diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 004c7bb446f493099f3829879d119369ad61b0e8..068ddd90d1e741a442c6f4625953f109cae4cab4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-05-17  Uros Bizjak  <ubizjak@gmail.com>
+
+	* doc/md.texi (Canonicalization of Instructions): Describe the
+	canonical form of instructions that inherently set a condition
+	code register.
+
 2017-05-17  Peter Bergner  <bergner@vnet.ibm.com>
 
 	PR middle-end/80775
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index dde3644890e3de3612a487966e29395cd76cb670..e3daceacf52d8d067f05891598806d2820f22136 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -7257,6 +7257,25 @@ the operations as far as possible.  For instance,
 For the @code{compare} operator, a constant is always the second operand
 if the first argument is a condition code register or @code{(cc0)}.
 
+@item
+For instructions that inherently set a condition code register, the
+@code{compare} operator is always written as the first RTL expression of
+the @code{parallel} instruction pattern.  For example,
+
+@smallexample
+(define_insn ""
+  [(set (reg:CCZ FLAGS_REG)
+	(compare:CCZ
+	  (plus:SI
+	    (match_operand:SI 1 "register_operand" "%r")
+	    (match_operand:SI 2 "register_operand" "r"))
+	  (const_int 0)))
+   (set (match_operand:SI 0 "register_operand" "=r")
+	(plus:SI (match_dup 1) (match_dup 2)))]
+  ""
+  "addl %0, %1, %2")
+@end smallexample
+
 @item
 An operand of @code{neg}, @code{not}, @code{mult}, @code{plus}, or
 @code{minus} is made the first operand under the same conditions as