From 81ad201ac5f609fb1f294b36045f4e3bfcb33695 Mon Sep 17 00:00:00 2001
From: Uros Bizjak <ubizjak@gmail.com>
Date: Wed, 17 May 2017 17:01:07 +0200
Subject: [PATCH] md.texi (Canonicalization of Instructions): Describe the
canonical form of instructions that inherently set a condition...
* doc/md.texi (Canonicalization of Instructions): Describe the
canonical form of instructions that inherently set a condition
code register.
From-SVN: r248156
---
gcc/ChangeLog | 6 ++++++
gcc/doc/md.texi | 19 +++++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 004c7bb446f4..068ddd90d1e7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-05-17 Uros Bizjak <ubizjak@gmail.com>
+
+ * doc/md.texi (Canonicalization of Instructions): Describe the
+ canonical form of instructions that inherently set a condition
+ code register.
+
2017-05-17 Peter Bergner <bergner@vnet.ibm.com>
PR middle-end/80775
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index dde3644890e3..e3daceacf52d 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -7257,6 +7257,25 @@ the operations as far as possible. For instance,
For the @code{compare} operator, a constant is always the second operand
if the first argument is a condition code register or @code{(cc0)}.
+@item
+For instructions that inherently set a condition code register, the
+@code{compare} operator is always written as the first RTL expression of
+the @code{parallel} instruction pattern. For example,
+
+@smallexample
+(define_insn ""
+ [(set (reg:CCZ FLAGS_REG)
+ (compare:CCZ
+ (plus:SI
+ (match_operand:SI 1 "register_operand" "%r")
+ (match_operand:SI 2 "register_operand" "r"))
+ (const_int 0)))
+ (set (match_operand:SI 0 "register_operand" "=r")
+ (plus:SI (match_dup 1) (match_dup 2)))]
+ ""
+ "addl %0, %1, %2")
+@end smallexample
+
@item
An operand of @code{neg}, @code{not}, @code{mult}, @code{plus}, or
@code{minus} is made the first operand under the same conditions as
--
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