From 875e256a3a4ab2ea75742ca433025ad4c03a4be0 Mon Sep 17 00:00:00 2001
From: Kazu Hirata <kazu@codesourcery.com>
Date: Sat, 14 Oct 2006 01:55:31 +0000
Subject: [PATCH] score.c, score.h: Fix comment typos.
* config/score/score.c, config/score/score.h: Fix comment
typos.
From-SVN: r117723
---
gcc/ChangeLog | 5 +++++
gcc/config/score/score.c | 4 ++--
gcc/config/score/score.h | 4 ++--
3 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b0879466b4a9..d4af4e1bd3ac 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2006-10-14 Kazu Hirata <kazu@codesourcery.com>
+
+ * config/score/score.c, config/score/score.h: Fix comment
+ typos.
+
2006-10-13 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
PR bootstrap/29402
diff --git a/gcc/config/score/score.c b/gcc/config/score/score.c
index 458de7922e23..b7a581eee60a 100644
--- a/gcc/config/score/score.c
+++ b/gcc/config/score/score.c
@@ -928,8 +928,8 @@ score_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
'U' print hi part of a CONST_INT rtx
'D' print first part of const double
- 'S' selectively print '!' if operand is 15bit instrucion accessable
- 'V' print "v!" if operand is 15bit instruction accessable, or
+ 'S' selectively print '!' if operand is 15bit instruction accessible
+ 'V' print "v!" if operand is 15bit instruction accessible, or
"lfh!"
'L' low part of DImode reg operand
diff --git a/gcc/config/score/score.h b/gcc/config/score/score.h
index 01fe9b57df8e..0a24a3f85e9f 100644
--- a/gcc/config/score/score.h
+++ b/gcc/config/score/score.h
@@ -209,7 +209,7 @@ extern GTY(()) rtx cmp_op1;
/* General Purpose Registers */ \
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, \
- /* Control Regisers */ \
+ /* Control Registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* CEH/ CEL/ CNT/ LCR/ SCR / ARG_POINTER_REGNUM/ FRAME_POINTER_REGNUM */\
0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
@@ -229,7 +229,7 @@ extern GTY(()) rtx cmp_op1;
/* General purpose register */ \
1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
- /* Control Regisers */ \
+ /* Control Registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* CP 1 Registers */ \
--
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