From 887f13916b18f46b563d527ad5001c6384e44a60 Mon Sep 17 00:00:00 2001
From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Thu, 10 Aug 2023 17:21:46 +0800
Subject: [PATCH] RISC-V: Support TU for integer ternary OP[PR110964]
PR target/110964
gcc/ChangeLog:
PR target/110964
* config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
gcc/testsuite/ChangeLog:
PR target/110964
* gcc.target/riscv/rvv/autovec/pr110964.c: New test.
---
gcc/config/riscv/riscv-v.cc | 3 +--
.../gcc.target/riscv/rvv/autovec/pr110964.c | 13 +++++++++++++
2 files changed, 14 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr110964.c
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index c9f0a4a9e7b0..a3062c906182 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -3604,8 +3604,7 @@ expand_cond_len_ternop (unsigned icode, rtx *ops)
if (FLOAT_MODE_P (mode))
emit_nonvlmax_fp_ternary_tu_insn (icode, RVV_TERNOP_TU, ops, len);
else
- /* FIXME: Enable this case when we support it in the middle-end. */
- gcc_unreachable ();
+ emit_nonvlmax_tu_insn (icode, RVV_TERNOP_TU, ops, len);
}
else
{
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr110964.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr110964.c
new file mode 100644
index 000000000000..cf2d1fb5f1d2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr110964.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=scalable -Ofast" } */
+
+int *a;
+long b, c;
+
+int d ()
+{
+ const int e;
+ for (; a < e; a++) /* { dg-warning "comparison between pointer and integer" } */
+ c += *a * b;
+}
+
--
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