From 904f332cce3de59b99a48751e69717cbd3592901 Mon Sep 17 00:00:00 2001
From: Dimitar Dimitrov <dimitar@dinux.eu>
Date: Thu, 12 Dec 2024 20:22:59 +0200
Subject: [PATCH] testsuite: RISC-V: Add effective target for E ABI variant
Add new effective target check for either ILP32E or ILP64E ABI variants.
Initial implementation only checks for RV32E or RV64E ISA, which in turn
implies that ILP32E/ILP64E ABI is used. The RV32I+ILP32E and
RV64I+ILP64E combinations are not yet caught by the check, but they
do not seem to be widely used currently.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp (check_effective_target_riscv_abi_e):
New procedure.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
---
gcc/testsuite/lib/target-supports.exp | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 45ba2f47a9d1..0ff00d189ff5 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1904,6 +1904,26 @@ proc check_effective_target_riscv_a { } {
}]
}
+# Return 1 if the ABI is either ILP32E or ILP64E, 0 otherwise.
+# Cache the result.
+
+proc check_effective_target_riscv_abi_e { } {
+ # If current ISA is E, then only E ABI is supported.
+ if { [check_no_compiler_messages riscv_abi_e assembly {
+ #ifndef __riscv_e
+ #error "Not __riscv_e"
+ #endif
+ }] } {
+ return 1
+ }
+
+ # E ABI can be chosen by both E and I base ISA variants.
+ #
+ # TODO - check for I ISA and E ABI combination.
+
+ return 0
+}
+
# Return 1 if the target arch supports the atomic LRSC extension, 0 otherwise.
# Cache the result.
--
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