From 90f775a9c7afd62cbd338b973ec9711354440c6c Mon Sep 17 00:00:00 2001
From: Uros Bizjak <uros@gcc.gnu.org>
Date: Mon, 19 Apr 2010 14:37:16 +0200
Subject: [PATCH] re PR target/43766 (x86 prefetch doesn't use complex memory
addressing)
PR target/43766
* config/i386/i386.c (ix86_decompose_address): Handle ASHIFT addends.
testsuite/ChangeLog:
PR target/43766
* gcc.target/i386/pr43766.c: New test.
From-SVN: r158515
---
gcc/ChangeLog | 14 +++++++++-----
gcc/config/i386/i386.c | 16 ++++++++++++++--
gcc/testsuite/ChangeLog | 5 +++++
gcc/testsuite/gcc.target/i386/pr43766.c | 10 ++++++++++
4 files changed, 38 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr43766.c
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 23f76a3fd051..f33e38f997b3 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,8 +1,12 @@
+2010-04-19 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/43766
+ * config/i386/i386.c (ix86_decompose_address): Handle ASHIFT addends.
+
2010-04-19 Jie Zhang <jie@codesourcery.com>
PR target/43662
- * reginfo.c (reinit_regs): Set caller_save_initialized_p
- to false.
+ * reginfo.c (reinit_regs): Set caller_save_initialized_p to false.
2010-04-19 Ira Rosen <irar@il.ibm.com>
@@ -82,10 +86,10 @@
(sse_prologue_save_insn1): New pattern and splitter.
(sse_prologue_save_insn): Update to deal also with 64bit aligned
blocks.
- * i386.c (setup_incoming_varargs_64): Do not compute jump destination here.
+ * i386.c (setup_incoming_varargs_64): Do not compute jump
+ destination here.
(ix86_gimplify_va_arg): Update alignment needed.
- (ix86_local_alignment): Do not align all local arrays
- to 128bit.
+ (ix86_local_alignment): Do not align all local arrays to 128bit.
2010-04-17 Jan Hubicka <jh@suse.cz>
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 7376d1b48e72..f91410a2d662 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -9357,6 +9357,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
rtx base_reg, index_reg;
HOST_WIDE_INT scale = 1;
rtx scale_rtx = NULL_RTX;
+ rtx tmp;
int retval = 1;
enum ix86_address_seg seg = SEG_DEFAULT;
@@ -9392,6 +9393,19 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
scale_rtx = XEXP (op, 1);
break;
+ case ASHIFT:
+ if (index)
+ return 0;
+ index = XEXP (op, 0);
+ tmp = XEXP (op, 1);
+ if (!CONST_INT_P (tmp))
+ return 0;
+ scale = INTVAL (tmp);
+ if ((unsigned HOST_WIDE_INT) scale > 3)
+ return 0;
+ scale = 1 << scale;
+ break;
+
case UNSPEC:
if (XINT (op, 1) == UNSPEC_TP
&& TARGET_TLS_DIRECT_SEG_REFS
@@ -9432,8 +9446,6 @@ ix86_decompose_address (rtx addr, struct ix86_address *out)
}
else if (GET_CODE (addr) == ASHIFT)
{
- rtx tmp;
-
/* We're called for lea too, which implements ashift on occasion. */
index = XEXP (addr, 0);
tmp = XEXP (addr, 1);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 01a260241496..06f9bf3c1463 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2010-04-19 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/43766
+ * gcc.target/i386/pr43766.c: New test.
+
2010-04-19 Jie Zhang <jie@codesourcery.com>
PR target/43662
diff --git a/gcc/testsuite/gcc.target/i386/pr43766.c b/gcc/testsuite/gcc.target/i386/pr43766.c
new file mode 100644
index 000000000000..701be6ef6f86
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr43766.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-options "-O2 -msse -mregparm=3" { target ilp32 } } */
+
+void p (int *a, int i)
+{
+ __builtin_prefetch (&a[i]);
+}
+
+/* { dg-final { scan-assembler-not "lea" } } */
--
GitLab