From 98e9edad8c537ec415c5481eb9c93d53df6e3a40 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Mon, 7 Aug 2023 11:44:37 +0200
Subject: [PATCH] x86: "sse4arg" adjustments
Record common properties in other attributes' default calculations:
There's always a 1-byte immediate, and they're always encoded in a VEX3-
like manner (note that "prefix_extra" already evaluates to 1 in this
case). The drop now (or already previously) redundant explicit
attributes, adding "mode" ones where they were missing.
Furthermore use "sse4arg" consistently for all VPCOM* insns; so far
signed comparisons did use it, while unsigned ones used "ssecmp". Note
that while they have (not counting the explicit or implicit immediate
operand) they really only have 3 operands, the operator is also counted
in those patterns. That's relevant for establishing the "memory"
attribute's value, and at the same time benign when there are only
register operands.
Note that despite also having 4 operands, multiply-add insns aren't
affected by this change, as they use "ssemuladd" for "type".
gcc/
* config/i386/i386.md (length_immediate): Handle "sse4arg".
(prefix): Likewise.
(*xop_pcmov_<mode>): Add "mode" attribute.
* config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
"prefix_rep", "prefix_extra", and "length_immediate" attributes.
(*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
(*xop_pcmov_<mode>): Add "mode" attribute.
* config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
attribute.
(xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
"prefix_extra", and "length_immediate" attributes.
(xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
(xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
and "length_immediate" attributes. Switch "type" to "sse4arg".
(xop_pcom_tf<mode>3): Likewise.
(xop_vpermil2<mode>3): Drop "length_immediate" attribute.
---
gcc/config/i386/i386.md | 7 ++++++-
gcc/config/i386/mmx.md | 26 ++++++--------------------
gcc/config/i386/sse.md | 24 +++++-------------------
3 files changed, 17 insertions(+), 40 deletions(-)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b2c42830f220..2484323135ca 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -536,6 +536,8 @@
(cond [(eq_attr "type" "incdec,setcc,icmov,str,lea,other,multi,idiv,leave,
bitmanip,imulx,msklog,mskmov")
(const_int 0)
+ (eq_attr "type" "sse4arg")
+ (const_int 1)
(eq_attr "unit" "i387,sse,mmx")
(const_int 0)
(eq_attr "type" "alu,alu1,negnot,imovx,ishift,ishiftx,ishift1,
@@ -635,6 +637,8 @@
(const_string "vex")
(eq_attr "mode" "XI,V16SF,V8DF")
(const_string "evex")
+ (eq_attr "type" "sse4arg")
+ (const_string "vex")
]
(const_string "orig")))
@@ -23292,7 +23296,8 @@
(match_operand:MODEF 3 "register_operand" "x")))]
"TARGET_XOP"
"vpcmov\t{%1, %3, %2, %0|%0, %2, %3, %1}"
- [(set_attr "type" "sse4arg")])
+ [(set_attr "type" "sse4arg")
+ (set_attr "mode" "TI")])
;; These versions of the min/max patterns are intentionally ignorant of
;; their behavior wrt -0.0 and NaN (via the commutative operand mark).
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 896af76a33f9..2713cdb112e1 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -2909,10 +2909,6 @@
"TARGET_XOP"
"vpcom%Y1<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
[(set_attr "type" "sse4arg")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_rep" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
(set_attr "mode" "TI")])
(define_insn "*xop_maskcmp<mode>3"
@@ -2923,10 +2919,6 @@
"TARGET_XOP"
"vpcom%Y1<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
[(set_attr "type" "sse4arg")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_rep" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
(set_attr "mode" "TI")])
(define_insn "*xop_maskcmp_uns<mode>3"
@@ -2936,11 +2928,7 @@
(match_operand:MMXMODEI 3 "register_operand" "x")]))]
"TARGET_XOP"
"vpcom%Y1u<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
- [(set_attr "type" "ssecmp")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_rep" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
+ [(set_attr "type" "sse4arg")
(set_attr "mode" "TI")])
(define_insn "*xop_maskcmp_uns<mode>3"
@@ -2950,11 +2938,7 @@
(match_operand:VI_16_32 3 "register_operand" "x")]))]
"TARGET_XOP"
"vpcom%Y1u<mmxvecsize>\t{%3, %2, %0|%0, %2, %3}"
- [(set_attr "type" "ssecmp")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_rep" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
+ [(set_attr "type" "sse4arg")
(set_attr "mode" "TI")])
(define_expand "vec_cmp<mode><mode>"
@@ -3144,7 +3128,8 @@
(match_operand:MMXMODE124 2 "register_operand" "x")))]
"TARGET_XOP && TARGET_MMX_WITH_SSE"
"vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
- [(set_attr "type" "sse4arg")])
+ [(set_attr "type" "sse4arg")
+ (set_attr "mode" "TI")])
(define_insn "*xop_pcmov_<mode>"
[(set (match_operand:VI_16_32 0 "register_operand" "=x")
@@ -3154,7 +3139,8 @@
(match_operand:VI_16_32 2 "register_operand" "x")))]
"TARGET_XOP"
"vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
- [(set_attr "type" "sse4arg")])
+ [(set_attr "type" "sse4arg")
+ (set_attr "mode" "TI")])
;; XOP permute instructions
(define_insn "mmx_ppermv64"
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 7e2aa3f995cb..8adea029753f 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -24879,7 +24879,8 @@
(match_operand:V_128_256 2 "nonimmediate_operand" "xm,x")))]
"TARGET_XOP"
"vpcmov\t{%3, %2, %1, %0|%0, %1, %2, %3}"
- [(set_attr "type" "sse4arg")])
+ [(set_attr "type" "sse4arg")
+ (set_attr "mode" "<sseinsnmode>")])
;; Recognize XOP's vpcmov from canonical (xor (and (xor t f) c) f)
(define_split
@@ -25797,10 +25798,6 @@
"TARGET_XOP"
"vpcom%Y1<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
[(set_attr "type" "sse4arg")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_rep" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
(set_attr "mode" "TI")])
(define_insn "xop_maskcmp_uns<mode>3"
@@ -25810,11 +25807,7 @@
(match_operand:VI_128 3 "nonimmediate_operand" "xm")]))]
"TARGET_XOP"
"vpcom%Y1u<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
- [(set_attr "type" "ssecmp")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_rep" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
+ [(set_attr "type" "sse4arg")
(set_attr "mode" "TI")])
;; Version of pcom*u* that is called from the intrinsics that allows pcomequ*
@@ -25829,10 +25822,7 @@
UNSPEC_XOP_UNSIGNED_CMP))]
"TARGET_XOP"
"vpcom%Y1u<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
- [(set_attr "type" "ssecmp")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
+ [(set_attr "type" "sse4arg")
(set_attr "mode" "TI")])
;; Pcomtrue and pcomfalse support. These are useless instructions, but are
@@ -25850,10 +25840,7 @@
? "vpcomtrue<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
: "vpcomfalse<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}");
}
- [(set_attr "type" "ssecmp")
- (set_attr "prefix_data16" "0")
- (set_attr "prefix_extra" "2")
- (set_attr "length_immediate" "1")
+ [(set_attr "type" "sse4arg")
(set_attr "mode" "TI")])
(define_insn "xop_vpermil2<mode>3"
@@ -25867,7 +25854,6 @@
"TARGET_XOP"
"vpermil2<ssemodesuffix>\t{%4, %3, %2, %1, %0|%0, %1, %2, %3, %4}"
[(set_attr "type" "sse4arg")
- (set_attr "length_immediate" "1")
(set_attr "mode" "<MODE>")])
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
--
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