From 9da6f93144619b0f798c2b43d7cf4fc8d42c13a0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christoph=20M=C3=BCllner?= <christoph.muellner@vrull.eu>
Date: Mon, 27 Mar 2023 12:51:51 +0200
Subject: [PATCH] target/109296 - riscv: Add missing mode specifiers for
XTheadMemPair
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This patch adds missing mode specifiers for XTheadMemPair INSNs.
gcc/ChangeLog:
PR target/109296
* config/riscv/thead.md: Add missing mode specifiers.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
gcc/config/riscv/thead.md | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/gcc/config/riscv/thead.md b/gcc/config/riscv/thead.md
index 63c4af6f77d8..0623607d3dc5 100644
--- a/gcc/config/riscv/thead.md
+++ b/gcc/config/riscv/thead.md
@@ -321,10 +321,10 @@
;; MEMPAIR load DI extended signed SI
(define_insn "*th_mempair_load_extendsidi2"
- [(set (match_operand 0 "register_operand" "=r")
- (sign_extend:DI (match_operand 1 "memory_operand" "m")))
- (set (match_operand 2 "register_operand" "=r")
- (sign_extend:DI (match_operand 3 "memory_operand" "m")))]
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (sign_extend:DI (match_operand:SI 1 "memory_operand" "m")))
+ (set (match_operand:DI 2 "register_operand" "=r")
+ (sign_extend:DI (match_operand:SI 3 "memory_operand" "m")))]
"TARGET_XTHEADMEMPAIR && TARGET_64BIT && reload_completed
&& th_mempair_operands_p (operands, true, SImode)"
{ return th_mempair_output_move (operands, true, SImode, SIGN_EXTEND); }
@@ -334,10 +334,10 @@
;; MEMPAIR load DI extended unsigned SI
(define_insn "*th_mempair_load_zero_extendsidi2"
- [(set (match_operand 0 "register_operand" "=r")
- (zero_extend:DI (match_operand 1 "memory_operand" "m")))
- (set (match_operand 2 "register_operand" "=r")
- (zero_extend:DI (match_operand 3 "memory_operand" "m")))]
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (zero_extend:DI (match_operand:SI 1 "memory_operand" "m")))
+ (set (match_operand:DI 2 "register_operand" "=r")
+ (zero_extend:DI (match_operand:SI 3 "memory_operand" "m")))]
"TARGET_XTHEADMEMPAIR && TARGET_64BIT && reload_completed
&& th_mempair_operands_p (operands, true, SImode)"
{ return th_mempair_output_move (operands, true, SImode, ZERO_EXTEND); }
--
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