From a2be4e155992151b60fca6969a97d6efd91e82b5 Mon Sep 17 00:00:00 2001
From: Andrew Pinski <quic_apinski@quicinc.com>
Date: Wed, 10 Jan 2024 22:13:03 -0800
Subject: [PATCH] expr: Limit the store flag optimization for single bit to
non-vectors [PR113322]
The problem here is after the recent vectorizer improvements, we end up
with a comparison against a vector bool 0 which then tries expand_single_bit_test
which is not expecting vector comparisons at all.
The IR was:
vector(4) <signed-boolean:1> mask_patt_5.13;
_Bool _12;
mask_patt_5.13_44 = vect_perm_even_41 != { 0.0, 1.0e+0, 2.0e+0, 3.0e+0 };
_12 = mask_patt_5.13_44 == { 0, 0, 0, 0 };
and we tried to call expand_single_bit_test for the last comparison.
Rejecting the vector comparison is needed.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR middle-end/113322
gcc/ChangeLog:
* expr.cc (do_store_flag): Don't try single bit tests with
comparison on vector types.
gcc/testsuite/ChangeLog:
* gcc.c-torture/compile/pr113322-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
---
gcc/expr.cc | 2 ++
gcc/testsuite/gcc.c-torture/compile/pr113322-1.c | 14 ++++++++++++++
2 files changed, 16 insertions(+)
create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr113322-1.c
diff --git a/gcc/expr.cc b/gcc/expr.cc
index 0bf80832fe50..34f5ff90a9f8 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -13621,6 +13621,8 @@ do_store_flag (sepops ops, rtx target, machine_mode mode)
if ((code == NE || code == EQ)
&& (integer_zerop (arg1)
|| integer_pow2p (arg1))
+ /* vector types are not handled here. */
+ && TREE_CODE (TREE_TYPE (arg1)) != VECTOR_TYPE
&& (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
{
tree narg0 = arg0;
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr113322-1.c b/gcc/testsuite/gcc.c-torture/compile/pr113322-1.c
new file mode 100644
index 000000000000..efed9603dfd7
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr113322-1.c
@@ -0,0 +1,14 @@
+/* { dg-additional-options "-march=sapphirerapids" { target x86_64*-*-* i?86-*-* } } */
+/* PR middle-end/113322 */
+
+float a[16];
+void
+foo ()
+{
+int i;
+for (i = 0; i < 16/2; i++)
+ {
+ if (a[2*i+((0 +1)%2)] != (3 * (2*i+((0 +1)%2)) + 2))
+ __builtin_abort ();
+ }
+}
--
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