From a6457974a1f443ab58d2334c02260299616c78b8 Mon Sep 17 00:00:00 2001
From: "Vladimir N. Makarov" <vmakarov@redhat.com>
Date: Thu, 9 Mar 2023 08:41:09 -0500
Subject: [PATCH] LRA: For clobbered regs use operand mode instead of the
biggest mode
LRA is too conservative in calculation of conflicts with clobbered regs by
using the biggest access mode. This results in failure of possible reg
coalescing and worse code. This patch solves the problem.
PR rtl-optimization/108999
gcc/ChangeLog:
* lra-constraints.cc (process_alt_operands): Use operand modes for
clobbered regs instead of the biggest access mode.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pr108999.c: New.
---
gcc/lra-constraints.cc | 3 ++-
gcc/testsuite/gcc.target/aarch64/pr108999.c | 21 +++++++++++++++++++++
2 files changed, 23 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/pr108999.c
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index dbfaf0485a5a..c38566a7451d 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -3108,7 +3108,8 @@ process_alt_operands (int only_alternative)
lra_assert (operand_reg[i] != NULL_RTX);
clobbered_hard_regno = hard_regno[i];
CLEAR_HARD_REG_SET (temp_set);
- add_to_hard_reg_set (&temp_set, biggest_mode[i], clobbered_hard_regno);
+ add_to_hard_reg_set (&temp_set, GET_MODE (*curr_id->operand_loc[i]),
+ clobbered_hard_regno);
first_conflict_j = last_conflict_j = -1;
for (j = 0; j < n_operands; j++)
if (j == i
diff --git a/gcc/testsuite/gcc.target/aarch64/pr108999.c b/gcc/testsuite/gcc.target/aarch64/pr108999.c
new file mode 100644
index 000000000000..a34db85be832
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr108999.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=armv8.2-a+sve" } */
+#include <arm_sve.h>
+
+void subreg_coalesce5 (
+ svbool_t pg, int64_t* base, int n,
+ int64_t *in1, int64_t *in2, int64_t*out
+)
+{
+ svint64x2_t result = svld2_s64 (pg, base);
+
+ for (int i = 0; i < n; i += 1) {
+ svint64_t v18 = svld1_s64(pg, in1 + i);
+ svint64_t v19 = svld1_s64(pg, in2 + i);
+ result.__val[0] = svmad_s64_z(pg, v18, v19, result.__val[0]);
+ result.__val[1] = svmad_s64_z(pg, v18, v19, result.__val[1]);
+ }
+ svst2_s64(pg, out, result);
+}
+
+/* { dg-final { scan-assembler-not {[ \t]*mov[ \t]*z[0-9]+\.d} } } */
--
GitLab