From b611f3969249967d7f098c6adfcf5f701192a2d0 Mon Sep 17 00:00:00 2001
From: Jeff Law <jlaw@ventanamicro.com>
Date: Thu, 4 Jul 2024 09:25:20 -0600
Subject: [PATCH] [committed][RISC-V] Fix test expectations after recent
late-combine changes
With the recent DCE related adjustment to late-combine the rvv/base/vcreate.c
test no longer has those undesirable vmvNr statements.
It's a bit unclear why this wasn't written as a scan-assembler-not and xfailed
given the comment says we don't want to see vmvNr insructions. I must have
missed that during review.
This patch adjusts the test to expect no vmvNr statements and if they're ever
re-introduced, we'll get a nice unexpected failure.
gcc/testsuite
* gcc.target/riscv/rvv/base/vcreate.c: Update expected output.
---
gcc/testsuite/gcc.target/riscv/rvv/base/vcreate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vcreate.c b/gcc/testsuite/gcc.target/riscv/rvv/base/vcreate.c
index 01006de7c815..1c7c154637e8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/vcreate.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vcreate.c
@@ -256,6 +256,6 @@ test_vcreate_v_i64m2x4 (vint64m2_t v0, vint64m2_t v1, vint64m2_t v2,
}
// Ideally with O3, should find 0 instances of any vmvnr.v PR113913
-/* { dg-final { scan-assembler-times {vmv1r.v\s+v[0-9]+,\s*v[0-9]+} 72 } } */
-/* { dg-final { scan-assembler-times {vmv2r.v\s+v[0-9]+,\s*v[0-9]+} 36 } } */
-/* { dg-final { scan-assembler-times {vmv4r.v\s+v[0-9]+,\s*v[0-9]+} 16 } } */
+/* { dg-final { scan-assembler-not {vmv1r.v\s+v[0-9]+,\s*v[0-9]+} } } */
+/* { dg-final { scan-assembler-not {vmv2r.v\s+v[0-9]+,\s*v[0-9]+} } } */
+/* { dg-final { scan-assembler-not {vmv4r.v\s+v[0-9]+,\s*v[0-9]+} } } */
--
GitLab