diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bcb9e847220014f5d25fcecceef1692028182678..c4711f35c03e67f818b3375fb2fc8001e5f833e3 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-02-11  Alexandre Oliva  <aoliva@redhat.com>
+
+	PR target/69634
+	* regstat.c (regstat_bb_compute_calls_crossed): Disregard
+	debug insns.
+
 2016-02-09  Uros Bizjak  <ubizjak@gmail.com>
 
 	* config/i386/i386.md (insv<mode>_1): Use gen_int_mode to
diff --git a/gcc/regstat.c b/gcc/regstat.c
index af5e475ddda6413400a5051f1e03ae75bb00edd5..c05b69f6c1a84691e46c5d7b24490ae5672eb9cb 100644
--- a/gcc/regstat.c
+++ b/gcc/regstat.c
@@ -444,7 +444,7 @@ regstat_bb_compute_calls_crossed (unsigned int bb_index, bitmap live)
       struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
       unsigned int regno;
 
-      if (!INSN_P (insn))
+      if (!NONDEBUG_INSN_P (insn))
 	continue;
 
       /* Process the defs.  */
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c15fe5f3aa65b09e572ce806b78a49241ac678bb..5fab7cb797d08a3ce8731f7b4115d3c8b8e38a7f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-02-11  Alexandre Oliva  <aoliva@redhat.com>
+
+	PR target/69634
+	* gcc.dg/pr69634.c: New.
+
 2016-02-09  Richard Biener  <rguenther@suse.de>
 
 	* gcc.dg/vect/vect-mask-store-move-1.c: Add missing space.
diff --git a/gcc/testsuite/gcc.dg/pr69634.c b/gcc/testsuite/gcc.dg/pr69634.c
new file mode 100644
index 0000000000000000000000000000000000000000..59e373907149f365ff3a3c1585bf47f0da2094aa
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr69634.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-dce -fschedule-insns -fno-tree-vrp -fcompare-debug" } */
+/* { dg-additional-options "-Wno-psabi -mno-sse" { target i?86-*-* x86_64-*-* } } */
+
+typedef unsigned short u16;
+typedef short v16u16 __attribute__ ((vector_size (16)));
+typedef unsigned v16u32 __attribute__ ((vector_size (16)));
+typedef unsigned long long v16u64 __attribute__ ((vector_size (16)));
+
+u16
+foo(u16 u16_1, v16u16 v16u16_0, v16u32 v16u64_0, v16u16 v16u16_1, v16u32 v16u32_1, v16u64 v16u64_1)
+{
+  v16u64_1 /= (v16u64){~v16u32_1[1]};
+  u16_1 = 0;
+  u16_1 /= v16u32_1[2];
+  v16u64_1 -= (v16u64) v16u16_1;
+  u16_1 >>= 1;
+  u16_1 -= ~0;
+  v16u16_1 /= (v16u16){~u16_1, 1 - v16u64_0[0], 0xffb6};
+  return u16_1 + v16u16_0[1] + v16u16_1[3] + v16u64_1[0] + v16u64_1[1];
+}