diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 21533a342875134e81ff8a7a2d32c0cf6e181d14..a1d333be0955463a14cb7efb7ec0b74c38d2982d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-01-03  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+	* config/s390/s390.md ("*cmp<mode>_ccs"): Fix comment mentioning
+	the instructions emitted by the pattern.
+	("*TDC_insn_<mode>"): Add comment.
+
 2012-01-03  Richard Guenther  <rguenther@suse.de>
 
 	PR middle-end/51730
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 4c9a40f6e8e4c5768b6739b4018b138cdd07b8ac..e8214dde60fac7527717dffdc48f0ca82c911726 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1010,7 +1010,7 @@
    [(set_attr "op_type" "RRE")
     (set_attr "type"  "fsimp<mode>")])
 
-; cxtr, cxbr, cdbr, cebr, cdb, ceb, cxbtr, cdbtr
+; cxtr, cxbr, cdtr, cdbr, cebr, cdb, ceb
 (define_insn "*cmp<mode>_ccs"
   [(set (reg CC_REGNUM)
         (compare (match_operand:FP 0 "register_operand" "f,f")
@@ -2816,6 +2816,7 @@
 ; is the register to be tested and the second one is the bit mask
 ; specifying the required test(s).
 ;
+; tcxb, tcdb, tceb, tdcxt, tdcdt, tdcet
 (define_insn "*TDC_insn_<mode>"
   [(set (reg:CCZ CC_REGNUM)
         (unspec:CCZ [(match_operand:FP_ALL 0 "register_operand" "f")