diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e2c252fbfe598cb9d4935264bc87b947384a22b8..4af8dcfc48f86b31febff04a3a4a637d4ac039ac 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-08-24  Richard Sandiford  <rsandifo@redhat.com>
+
+	* config/mips/mips.md (load_call[sd]i): Redefine using :P.  Add mode
+	attribute.
+
 2004-08-24  Richard Sandiford  <rsandifo@redhat.com>
 
 	* config/mips/mips.md (indirect_jump): Use force_reg.  Adjust names
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 739307c758ee3bcb1ced61ad5b3023237120ca8d..251ec685700ebb8add87f490c1762b6e5bae85f1 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -5720,26 +5720,16 @@ beq\t%2,%.,1b\;\
 ;; acts like a GOT version number.  By making the register call-clobbered,
 ;; we tell the target-independent code that the address could be changed
 ;; by any call insn.
-(define_insn "load_callsi"
-  [(set (match_operand:SI 0 "register_operand" "=c")
-	(unspec:SI [(match_operand:SI 1 "register_operand" "r")
-		    (match_operand:SI 2 "immediate_operand" "")
-		    (reg:SI FAKE_CALL_REGNO)]
-		   UNSPEC_LOAD_CALL))]
+(define_insn "load_call<mode>"
+  [(set (match_operand:P 0 "register_operand" "=c")
+	(unspec:P [(match_operand:P 1 "register_operand" "r")
+		   (match_operand:P 2 "immediate_operand" "")
+		   (reg:P FAKE_CALL_REGNO)]
+		  UNSPEC_LOAD_CALL))]
   "TARGET_ABICALLS"
-  "lw\t%0,%R2(%1)"
-  [(set_attr "type" "load")
-   (set_attr "length" "4")])
-
-(define_insn "load_calldi"
-  [(set (match_operand:DI 0 "register_operand" "=c")
-	(unspec:DI [(match_operand:DI 1 "register_operand" "r")
-		    (match_operand:DI 2 "immediate_operand" "")
-		    (reg:DI FAKE_CALL_REGNO)]
-		   UNSPEC_LOAD_CALL))]
-  "TARGET_ABICALLS"
-  "ld\t%0,%R2(%1)"
+  "<load>\t%0,%R2(%1)"
   [(set_attr "type" "load")
+   (set_attr "mode" "<MODE>")
    (set_attr "length" "4")])
 
 ;; Sibling calls.  All these patterns use jump instructions.